Searched +full:gce +full:- +full:mailbox (Results 1 – 8 of 8) sorted by relevance
/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | mediatek,gce-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-props.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Houlong Wei <houlong.wei@mediatek.com> 13 The Global Command Engine (GCE) is an instruction based, multi-threaded, 14 single-core command dispatcher for MediaTek hardware. The Command Queue 15 (CMDQ) mailbox driver is a driver for GCE, implemented using the Linux 16 mailbox framework. It is used to receive messages from mailbox consumers 17 and configure GCE to execute the specified instruction set in the message. [all …]
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H A D | mediatek,gce-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek Global Command Engine Mailbox 10 - Houlong Wei <houlong.wei@mediatek.com> 13 The Global Command Engine (GCE) is used to help read/write registers with 15 vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. 20 - enum: 21 - mediatek,mt6779-gce [all …]
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/linux/include/linux/soc/mediatek/ |
H A D | mtk-cmdq.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 11 #include <linux/mailbox/mtk-cmdq-mailbox.h> 19 * so there are 4 * N (threads) SPRs in GCE that shares the same indexes below. 67 * cmdq_dev_get_client_reg() - parse cmdq client reg from the device 69 * @dev: device of CMDQ mailbox clien [all...] |
/linux/drivers/mailbox/ |
H A D | mtk-cmdq-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 8 #include <linux/dma-mapping.h> 18 #include <linux/mailbox/mtk-cmdq-mailbox.h> 24 #define CMDQ_NUM_CMD(t) (t->cmd_buf_size / CMDQ_INST_SIZE) 73 struct cmdq_pkt *pkt; /* the packet sent from mailbox client */ 97 WARN_ON(clk_bulk_enable(cmdq->pdata->gce_num, cmdq->clocks)); in cmdq_sw_ddr_enable() 100 writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); in cmdq_sw_ddr_enable() 102 writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); in cmdq_sw_ddr_enable() 104 clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks); in cmdq_sw_ddr_enable() [all …]
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mediatek,mt6795-clk.h> 12 #include <dt-bindings/gce/mediatek,mt6795-gce.h> 13 #include <dt-bindings/memory/mt6795-larb-port.h> 14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h> 15 #include <dt-bindings/power/mt6795-power.h> 16 #include <dt-bindings/reset/mediatek,mt6795-resets.h> 20 interrupt-parent = <&sysirq>; [all …]
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H A D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8192-larb-port.h> 13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/power/mt8192-power.h> [all …]
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/linux/drivers/gpu/drm/mediatek/ |
H A D | mtk_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/dma-mapping.h> 11 #include <linux/soc/mediatek/mtk-cmdq.h> 12 #include <linux/soc/mediatek/mtk-mmsys.h> 13 #include <linux/soc/mediatek/mtk-mutex.h> 29 * struct mtk_crtc - MediaTek specific crtc structure. 97 struct drm_crtc *crtc = &mtk_crtc->base; in mtk_crtc_finish_page_flip() 100 if (mtk_crtc->event) { in mtk_crtc_finish_page_flip() 101 spin_lock_irqsave(&crtc->dev->event_lock, flags); in mtk_crtc_finish_page_flip() 102 drm_crtc_send_vblank_event(crtc, mtk_crtc->event); in mtk_crtc_finish_page_flip() [all …]
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