| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm283x-rpi-usb-otg.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 g-rx-fifo-size = <256>; 5 g-np-tx-fifo-size = <32>; 8 * fifo sizes shouldn't exceed 3776 bytes. 10 g-tx-fifo-size = <256 256 512 512 512 768 768>;
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| H A D | bcm283x-rpi-usb-peripheral.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 g-rx-fifo-size = <256>; 5 g-np-tx-fifo-size = <32>; 6 g-tx-fifo-size = <256 256 512 512 512 768 768>;
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | dwc2.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 13 - $ref: usb-drd.yaml# 14 - $ref: usb-hcd.yaml# 19 - const: brcm,bcm2835-usb 20 - const: hisilicon,hi6220-usb 21 - const: ingenic,jz4775-otg 22 - const: ingenic,jz4780-otg [all …]
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| H A D | snps,dwc3-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 vendor-specific implementation or as a standalone component. 17 - $ref: usb-drd.yaml# 18 - if: 24 - dr_mode 28 $ref: usb-xhci.yaml# [all …]
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| H A D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 26 host-only mode. 33 - amlogic,meson-gxl-usb-ctrl 34 - amlogic,meson-gxm-usb-ctrl [all …]
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| /linux/drivers/net/ethernet/sun/ |
| H A D | cassini.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as 30 * 32-bit words. there is no i/o port access. REG_ addresses are 41 /* this register sets the weights for the weighted round robin arbiter. e.g., 42 * if rx weight == 1 and tx weight == 0, rx == 2x tx transfer credit 45 * DEFAULT: 0x0, SIZE: 5 bits 54 /* if enabled, BIM can send bursts across PCI bus > cacheline size. burst 57 * DEFAULT: 0x0, SIZE: 1 bit 62 /* top level interrupts [0-9] are auto-cleared to 0 when the status 63 * register is read. second level interrupts [13 - 18] are cleared at [all …]
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| /linux/drivers/usb/mtu3/ |
| H A D | mtu3.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * mtu3.h - MediaTek USB3 DRD header 35 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10)) 36 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10)) 37 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10)) 39 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10)) 40 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10)) 41 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10)) 43 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4)) 44 #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4)) [all …]
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| H A D | mtu3_core.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * mtu3_core.c - hardware access layer and gadget init/exit of 4 * MediaTek usb3 Dual-Role Controller Driver 11 #include <linux/dma-mapping.h> 25 struct mtu3_fifo_info *fifo = mep->fifo; in ep_fifo_alloc() local 29 /* ensure that @mep->fifo_seg_size is power of two */ in ep_fifo_alloc() 31 if (num_bits > fifo->limit) in ep_fifo_alloc() 32 return -EINVAL; in ep_fifo_alloc() 34 mep->fifo_seg_size = num_bits * MTU3_EP_FIFO_UNIT; in ep_fifo_alloc() 35 num_bits = num_bits * (mep->slot + 1); in ep_fifo_alloc() [all …]
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| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 37 compatible = "fixed-clock"; 38 clock-frequency = <24000000>; 39 #clock-cells = <0>; [all …]
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| H A D | rk3128.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3128-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3128-power.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; [all …]
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| H A D | rk3036.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3036-cru.h> 8 #include <dt-bindings/soc/rockchip,boot-mode.h> 9 #include <dt-bindings/power/rk3036-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | intel,dwmac-plat.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> 17 - intel,keembay-dwmac 19 - compatible 22 - $ref: snps,dwmac.yaml# 27 - items: 28 - enum: [all …]
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| /linux/arch/mips/boot/dts/ingenic/ |
| H A D | x1830.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/ingenic,x1830-cgu.h> 4 #include <dt-bindings/dma/x1830-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu2.0-mxu2.0"; 21 clock-names = "cpu"; [all …]
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| H A D | x1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/ingenic,x1000-cgu.h> 4 #include <dt-bindings/dma/x1000-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 21 clock-names = "cpu"; [all …]
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| H A D | jz4780.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h> 4 #include <dt-bindings/dma/jz4780-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 21 clock-names = "cpu"; [all …]
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| /linux/Documentation/networking/device_drivers/can/ctu/ |
| H A D | ctucanfd-driver.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later 10 ------------------------ 19 `Vivado integration <https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top>`_ 20 and Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board 21 `QSys integration <https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd>`_ 23 `PCIe integration <https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd>`_ of the core. 33 version of emulation support can be cloned from ctu-canfd branch of QEMU local 34 development `repository <https://gitlab.fel.cvut.cz/canbus/qemu-canbus>`_. 38 --------------- 46 in the same way as, e.g., UDP/IP over Ethernet. [all …]
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| /linux/drivers/usb/musb/ |
| H A D | musb_gadget.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (C) 2005-2006 by Texas Instruments 7 * Copyright (C) 2006-2007 Nokia Corporation 19 #include <linux/dma-mapping.h> 26 /* ----------------------------------------------------------------------- */ 29 (req->map_state != UN_MAPPED)) 37 struct dma_controller *dma = musb->dma_controller; in map_dma_buffer() 39 request->map_state = UN_MAPPED; in map_dma_buffer() 41 if (!is_dma_capable() || !musb_ep->dma) in map_dma_buffer() 48 if (dma->is_compatible) in map_dma_buffer() [all …]
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| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | b43.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 61 /* 32-bit DMA */ 68 /* 64-bit DMA */ 202 #define B43_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */ 203 #define B43_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */ 206 #define B43_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */ 209 #define B43_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */ 211 #define B43_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */ 212 #define B43_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */ 234 #define B43_SHM_AUTOINC_R 0x0200 /* Auto-increment address on read */ [all …]
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| /linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| H A D | d11.h | 26 /* RX FIFO numbers */ 28 #define RX_TXSTATUS_FIFO 3 /* RX fifo for tx status packages */ 30 /* TX FIFO numbers using WME Access Category */ 31 #define TX_AC_BK_FIFO 0 /* Background TX FIFO */ 32 #define TX_AC_BE_FIFO 1 /* Best-Effort TX FIFO */ 33 #define TX_AC_VI_FIFO 2 /* Video TX FIFO */ 34 #define TX_AC_VO_FIFO 3 /* Voice TX FIFO */ 35 #define TX_BCMC_FIFO 4 /* Broadcast/Multicast TX FIFO */ 36 #define TX_ATIM_FIFO 5 /* TX fifo for ATIM window info */ 44 /* Legacy TX FIFO numbers */ [all …]
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am654-idk.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include "k3-pinctrl.h" 17 ethernet3 = "/icssg0-eth/ethernet-ports/port@0"; 18 ethernet4 = "/icssg0-eth/ethernet-ports/port@1"; 19 ethernet5 = "/icssg1-eth/ethernet-ports/port@0"; 20 ethernet6 = "/icssg1-eth/ethernet-ports/port@1"; [all …]
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| /linux/Documentation/networking/device_drivers/ethernet/stmicro/ |
| H A D | stmmac.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 13 - In This Release 14 - Feature List 15 - Kernel Configuration 16 - Command Line Parameters 17 - Driver Information and Notes 18 - Debug Information 19 - Support 33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0 35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores [all …]
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| /linux/drivers/net/ethernet/tehuti/ |
| H A D | tehuti.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 * RX HW/SW interaction overview 11 * There are 2 types of RX communication channels between driver and NIC. 12 * 1) RX Free Fifo - RXF - holds descriptors of empty buffers to accept incoming 13 * traffic. This Fifo is filled by SW and is readen by HW. Each descriptor holds 14 * info about buffer's location, size and ID. An ID field is used to identify a 15 * buffer when it's returned with data via RXD Fifo (see below) 16 * 2) RX Data Fifo - RXD - holds descriptors of full buffers. This Fifo is 18 * HW pops descriptor from RXF Fifo, stores ID, fills buffer with incoming data, 20 * pushes it into RXD Fifo and raises interrupt to indicate new RX data. [all …]
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| H A D | tehuti.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 30 #include <linux/dma-mapping.h> 53 /* RX copy break size */ 60 #define BDX_NIC2PORT_NAME "Tehuti 2-Port 10 Giga TOE SmartNIC" 70 * ifcontig eth1 txqueuelen 3000 - to change it at runtime */ 97 #define READ_REG(pp, reg) readl(pp->pBdxRegs + reg) 98 #define WRITE_REG(pp, reg, val) writel(val, pp->pBdxRegs + reg) 111 #define BDX_MAX_TX_LEVEL (priv->txd_fifo0.m.memsz - 16) 127 #define BITS_MASK(nbits) ((1<<nbits)-1) 142 struct fifo { struct [all …]
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| /linux/tools/testing/selftests/net/forwarding/ |
| H A D | tsn_lib.sh | 2 # SPDX-License-Identifier: GPL-2.0 3 # Copyright 2021-2022 NXP 5 tc_testing_scripts_dir=$(dirname $0)/../../tc-testing/scripts 15 # https://github.com/vladimiroltean/tsn-scripts 16 # WARNING: isochron versions pre-1.0 are unstable, 31 if ! [ -z "${uds_address}" ]; then 32 extra_args="${extra_args} -z ${uds_address}" 37 chrt -f 10 phc2sys -m \ 38 -a -rr \ 39 --step_threshold 0.00002 \ [all …]
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| /linux/drivers/usb/gadget/udc/ |
| H A D | snps_udc_core.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * amd5536.c -- AMD 5536 UDC high/full speed USB device controller 5 * Copyright (C) 2005-2007 AMD (https://www.amd.com) 63 * slave mode: pending bytes in rx fifo after nyet, 76 /* set_rde -- Is used to control enabling of RX DMA. Problem is 77 * that UDC has only one bit (RDE) to enable/disable RX DMA for 79 * when OUT data reaches the fifo but no request was queued yet. 80 * This cannot be solved by letting the RX DMA disabled until a 82 * in the FIFO (important for not blocking control traffic). 85 * set_rde -1 == not used, means it is alloed to be set to 0 or 1 [all …]
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