| /linux/drivers/nvmem/ |
| H A D | apple-efuses.c | 15 void __iomem *fuses; member
25 *dst++ = readl_relaxed(priv->fuses + offset); in apple_efuses_read()
53 priv->fuses = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in apple_efuses_probe()
54 if (IS_ERR(priv->fuses)) in apple_efuses_probe()
55 return PTR_ERR(priv->fuses); in apple_efuses_probe()
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| H A D | qfprom.c | 152 * when we're not blowing fuses. At the moment, the regulator framework in qfprom_disable_fuse_blowing()
246 * qfprom_reg_write() - Write to fuses.
252 * Writes to fuses. WARNING: THIS IS PERMANENT.
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| /linux/drivers/pmdomain/qcom/ |
| H A D | cpr.c | 804 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_populate_ring_osc_idx() local
808 for (; fuse < end; fuse++, fuses++) { in cpr_populate_ring_osc_idx()
809 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->ring_osc, &data); in cpr_populate_ring_osc_idx()
846 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_fuse_corner_init() local
867 for (i = 0; fuse <= end; fuse++, fuses++, i++, fdata++) { in cpr_fuse_corner_init()
877 uV = cpr_read_fuse_uV(desc, fdata, fuses->init_voltage, in cpr_fuse_corner_init()
897 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->quotient, &fuse->quot); in cpr_fuse_corner_init()
1068 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_corner_init() local
1166 quot_offset = fuses[fnum].quotient_offset; in cpr_corner_init()
1219 struct cpr_fuse *fuses; in cpr_get_fuses() local
[all …]
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | nvidia,tegra20-usb-phy.yaml | 167 nvidia,xcvr-setup-use-fuses:
168 description: Indicates that the value is read from the on-chip fuses.
254 - required: ["nvidia,xcvr-setup-use-fuses"]
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | microchip,mcp3564.yaml | 84 The address is set on a per-device basis by fuses in the factory,
85 configured on request. If not requested, the fuses are set for 0x1.
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| /linux/arch/mips/cavium-octeon/executive/ |
| H A D | octeon-model.c | 462 /* Check for model in fuses, overrides normal decode */ in octeon_model_get_string_buffer()
475 /* Have both number and suffix in fuses, so both */ in octeon_model_get_string_buffer()
484 /* Don't have suffix, so just use model from fuses */ in octeon_model_get_string_buffer()
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| H A D | cvmx-l2c.c | 824 * cvmx_mio_fus_dat3.s.l2c_crip fuses map as follows in cvmx_l2c_get_num_assoc()
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| /linux/Documentation/devicetree/bindings/cpufreq/ |
| H A D | imx-cpufreq-dt.txt | 5 "speed grading" value which are written in fuses. These bits are combined with
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| /linux/drivers/rtc/ |
| H A D | rtc-stmp3xxx.c | 303 * are 32000 Hz and 32768 Hz) is detectable from fuses, but as reality in stmp3xxx_rtc_probe()
304 * proves these fuses are not blown correctly on all machines, so the in stmp3xxx_rtc_probe()
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| /linux/drivers/bus/ |
| H A D | intel-ixp4xx-eb.c | 69 /* Fuses on the IXP43x */
377 /* Check some fuses */ in ixp4xx_exp_probe()
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| /linux/drivers/soc/tegra/fuse/ |
| H A D | speedo-tegra210.c | 116 /* Read speedo/IDDQ fuses */ in tegra210_init_speedo_data()
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| /linux/Documentation/security/keys/ |
| H A D | trusted-encrypted.rst | 36 fuses and is accessible to TEE only.
48 in the on-chip fuses and is accessible to the DCP encryption engine only.
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| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra30-asus-tf201.dts | 590 /delete-property/ nvidia,xcvr-setup-use-fuses;
595 /delete-property/ nvidia,xcvr-setup-use-fuses;
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| H A D | tegra30.dtsi | 1143 nvidia,xcvr-setup-use-fuses;
1186 nvidia,xcvr-setup-use-fuses;
1228 nvidia,xcvr-setup-use-fuses;
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| H A D | tegra20-acer-a500-picasso.dts | 1107 nvidia,xcvr-setup-use-fuses;
1118 nvidia,xcvr-setup-use-fuses;
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| /linux/drivers/soc/qcom/ |
| H A D | ice.c | 120 /* If fuses are blown, ICE might not work in the standard way. */ in qcom_ice_check_supported()
125 dev_warn(dev, "Fuses are blown; ICE is unusable!\n"); in qcom_ice_check_supported()
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| /linux/drivers/soc/imx/ |
| H A D | soc-imx8m.c | 80 * SOC revision on older imx8mq is not available in fuses so query in imx8mq_soc_revision()
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| /linux/drivers/thermal/mediatek/ |
| H A D | auxadc_thermal.c | 123 * Layout of the fuses providing the calibration data
144 * Layout of the fuses providing the calibration data
158 * Layout of the fuses providing the calibration data
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| /linux/include/linux/firmware/intel/ |
| H A D | stratix10-smc.h | 603 * Sync call to dump all the fuses and key hashes
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| /linux/drivers/clk/tegra/ |
| H A D | clk-tegra124-emc.c | 514 * fuses until the apbmisc driver is loaded. in tegra124_clk_register_emc()
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| /linux/drivers/nvme/target/ |
| H A D | passthru.c | 138 id->fuses = 0; in nvmet_passthru_override_id_ctrl()
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| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_configfs.c | 86 * even if they are available in hardware. This is applied after HW fuses are
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mn.dtsi | 581 * reg = <0x4 0x8> describes fuses 0x410 and
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| /linux/drivers/usb/phy/ |
| H A D | phy-tegra-usb.c | 1172 pdev->dev.of_node, "nvidia,xcvr-setup-use-fuses"); in utmi_phy_probe()
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| /linux/include/linux/ |
| H A D | nvme.h | 371 __le16 fuses; member
|