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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc885-tsa
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H A Dfsl,qe-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC QE Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc8321-tsa
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/linux/include/sound/
H A Dsoc-dai.h1 /* SPDX-License-Identifier: GPL-2.0
3 * linux/sound/soc-dai.h -- ALSA SoC Layer
5 * Copyright: 2005-2008 Wolfson Microelectronics. PLC.
66 * define GATED -> CONT. GATED will be selected if both are selected.
82 * - "normal" polarity means signal is available at rising edge of BCLK
83 * - "inverted" polarity means signal is available at falling edge of BCLK
85 * FSYNC "normal" polarity depends on the frame format:
86 * - I2S: frame consists of left then right channel data. Left channel starts
87 * with falling FSYNC edge, right channel starts with rising FSYNC edge.
88 * - Left/Right Justified: frame consists of left then right channel data.
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/linux/sound/soc/sh/
H A Drz-ssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas RZ/G2L ASoC Serial Sound Interface (SSIF-2) Driver
74 #define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-44.1kHz */
117 * The SSI supports full-duplex transmission and reception.
120 * So it is better to use as half-duplex (playing and recording
148 writel(data, (priv->base + reg)); in rz_ssi_reg_writel()
153 return readl(priv->base + reg); in rz_ssi_reg_readl()
161 val = readl(priv->base + reg); in rz_ssi_reg_mask_setl()
163 writel(val, (priv->base + reg)); in rz_ssi_reg_mask_setl()
177 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in rz_ssi_stream_is_play()
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/linux/drivers/soc/fsl/qe/
H A Dtsa.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
12 #include <dt-bindings/soc/qe-fsl,tsa.h>
51 * - CPM1: 32bit register split in 2*16bit (16bit TDM)
52 * - QE: 4x16bit registers, one per TDM
183 return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]); in tsa_serial_get_tsa()
229 return tsa->version == TSA_QE; in tsa_is_qe()
238 switch (tsa_serial->id) { in tsa_qe_serial_get_num()
248 dev_err(tsa->dev, "Unsupported serial id %u\n", tsa_serial->id); in tsa_qe_serial_get_num()
249 return -EINVAL; in tsa_qe_serial_get_num()
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