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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedule.td1 //===-- RISCVSchedule.td - RISC-V Scheduling Definitions ---*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 def WriteIALU : SchedWrite; // 32 or 64-bit integer ALU operations
11 def WriteIALU32 : SchedWrite; // 32-bit integer ALU operations on RV64I
12 def WriteShiftImm : SchedWrite; // 32 or 64-bit shift by immediate operations
13 def WriteShiftImm32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix
14 def WriteShiftReg : SchedWrite; // 32 or 64-bit shift by immediate operations
15 def WriteShiftReg32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix
16 def WriteIDiv : SchedWrite; // 32-bit or 64-bit divide
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H A DRISCVScheduleV.td1 //===- RISCVScheduleV.td - RISC-V Scheduling Definitions V -*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
18 // Used for floating-point as it doesn't contain MF8.
20 // Used for widening floating-point Reduction as it doesn't contain MF8.
24 assert !or(!not(isF), !ne(mx, "MF8")), "LMUL shouldn't be MF8 for floating-point";
32 // For floating-point instructions, SEW won't be 8.
96 // Allow multiclass to refer to SchedVars -- need to have NAME prefix.
283 // 6. Configuration-Setting Instructions
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A Dfloating-point.json9 "PublicDescription": "Counts all microcode Floating Point assists.",
15-bit packed double precision floating-point instructions retired; some instructions will count twi…
21-bit packed double precision floating-point instructions retired; some instructions will count twi…
26-bit packed single precision floating-point instructions retired; some instructions will count twi…
32-bit packed single precision floating-point instructions retired; some instructions will count twi…
37-bit packed double precision floating-point instructions retired; some instructions will count twi…
43-bit packed double precision floating-point instructions retired; some instructions will count twi…
48-bit packed single precision floating-point instructions retired; some instructions will count twi…
54-bit packed single precision floating-point instructions retired; some instructions will count twi…
59-bit packed double precision floating-point instructions retired; some instructions will count twi…
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A Dfloating-point.json9 "PublicDescription": "Counts all microcode Floating Point assists.",
15-bit packed double precision floating-point instructions retired; some instructions will count twi…
21-bit packed double precision floating-point instructions retired; some instructions will count twi…
26-bit packed single precision floating-point instructions retired; some instructions will count twi…
32-bit packed single precision floating-point instructions retired; some instructions will count twi…
37-bit packed double precision floating-point instructions retired; some instructions will count twi…
43-bit packed double precision floating-point instructions retired; some instructions will count twi…
48-bit packed single precision floating-point instructions retired; some instructions will count twi…
54-bit packed single precision floating-point instructions retired; some instructions will count twi…
59-bit packed double precision floating-point instructions retired; some instructions will count twi…
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/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A Dfloating-point.json9 "PublicDescription": "Counts all microcode Floating Point assists.",
14-bit packed double precision floating-point instructions retired; some instructions will count twi…
20-bit packed double precision floating-point instructions retired; some instructions will count twi…
25-bit packed single precision floating-point instructions retired; some instructions will count twi…
31-bit packed single precision floating-point instructions retired; some instructions will count twi…
36-bit packed double precision floating-point instructions retired; some instructions will count twi…
42-bit packed double precision floating-point instructions retired; some instructions will count twi…
47-bit packed single precision floating-point instructions retired; some instructions will count twi…
53-bit packed single precision floating-point instructions retired; some instructions will count twi…
58-bit packed double precision floating-point instructions retired; some instructions will count twi…
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86Schedule.td1 //===-- X86Schedule.td - X86 Scheduling Definitions -------
[all...]
H A DX86ScheduleZnver3.td1 //=- X86ScheduleZnver3.td - X86 Znver3 Scheduling ------------*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
18 //===----------------------------------------------------------------------===//
27 // outstanding operations (integer, load/store, and floating-point) and is
30 // to 256 macro ops in-flight in non-SMT mode or 128 per thread in SMT mode.
34 // At each set-way intersection is an entry containing up to 8 macro ops.
37 // the op-cache, we limit the loop buffer to 8*12 = 96 to avoid loop unrolling
38 // leading to excessive filling of the op-cache from frontend.
41 // The L1 data cache has a 4- or 5- cycle integer load-to-use latency.
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A Dfloating-point.json3 …riefDescription": "Counts once for most SIMD 128-bit packed computational double precision floatin…
8-bit packed computational double precision floating-point instructions retired; some instructions …
13 …riefDescription": "Counts once for most SIMD 128-bit packed computational single precision floatin…
18-bit packed computational single precision floating-point instructions retired; some instructions …
23 …riefDescription": "Counts once for most SIMD 256-bit packed double computational precision floatin…
28-bit packed double computational precision floating-point instructions retired; some instructions …
33 …riefDescription": "Counts once for most SIMD 256-bit packed single computational precision floatin…
38-bit packed single computational precision floating-point instructions retired; some instructions …
43-bit packed double precision floating-point instructions retired; some instructions will count twi…
48-bit packed double precision floating-point instructions retired; some instructions will count twi…
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/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A Dfloating-point.json3 …riefDescription": "Counts once for most SIMD 128-bit packed computational double precision floatin…
8-bit packed computational double precision floating-point instructions retired; some instructions …
13 …riefDescription": "Counts once for most SIMD 128-bit packed computational single precision floatin…
18-bit packed computational single precision floating-point instructions retired; some instructions …
23 …riefDescription": "Counts once for most SIMD 256-bit packed double computational precision floatin…
28-bit packed double computational precision floating-point instructions retired; some instructions …
33 …riefDescription": "Counts once for most SIMD 256-bit packed single computational precision floatin…
38-bit packed single computational precision floating-point instructions retired; some instructions …
43-bit packed double precision floating-point instructions retired; some instructions will count twi…
48-bit packed double precision floating-point instructions retired; some instructions will count twi…
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/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A Dfloating-point.json20 "PublicDescription": "Counts all microcode Floating Point assists.",
65-bit packed double precision floating-point instructions retired; some instructions will count twi…
71-bit packed double precision floating-point instructions retired; some instructions will count twi…
76-bit packed single precision floating-point instructions retired; some instructions will count twi…
82-bit packed single precision floating-point instructions retired; some instructions will count twi…
87-bit packed double precision floating-point instructions retired; some instructions will count twi…
93-bit packed double precision floating-point instructions retired; some instructions will count twi…
98-bit packed single precision floating-point instructions retired; some instructions will count twi…
104-bit packed single precision floating-point instructions retired; some instructions will count twi…
109-bit packed double precision floating-point instructions retired; some instructions will count twi…
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/freebsd/contrib/llvm-project/libcxx/include/
H A Datomic1 // -*- C++ -*-
2 //===----------------------------------------------------------------------===//
6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8 //===----------------------------------------------------------------------===//
31 consume, // load-consume
32 acquire, // load-acquire
33 release, // store-release
34 acq_rel, // store-release load-acquire
35 seq_cst // store-release load-acquire
47 // lock-free property
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A Dfloating-point.json3 …riefDescription": "Counts once for most SIMD 128-bit packed computational double precision floatin…
8-bit packed computational double precision floating-point instructions retired; some instructions …
13 …riefDescription": "Counts once for most SIMD 128-bit packed computational single precision floatin…
18-bit packed computational single precision floating-point instructions retired; some instructions …
23 …riefDescription": "Counts once for most SIMD 256-bit packed double computational precision floatin…
28-bit packed double computational precision floating-point instructions retired; some instructions …
33 …riefDescription": "Counts once for most SIMD 256-bit packed single computational precision floatin…
38-bit packed single computational precision floating-point instructions retired; some instructions …
43 …n": "Counts once for most SIMD scalar computational double precision floating-point instructions r…
48floating-point instructions retired; some instructions will count twice as noted below. Each coun…
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/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Davxneconvertintrin.h1 /*===-------------- avxneconvertintrin.h - AVXNECONVERT --------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
28 /// Convert scalar BF16 (16-bit) floating-point element
30 /// single-precision (32-bit) floating-point, broadcast it to packed
31 /// single-precision (32-bit) floating-point elements, and store the results in
43 /// A pointer to a 16-bit memory location. The address of the memory
46 /// A 128-bit vector of [4 x float].
61 /// Convert scalar BF16 (16-bit) floating-point element
63 /// single-precision (32-bit) floating-point, broadcast it to packed
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/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DSMTAPI.h1 //===- SMTAPI.h -------------------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
34 /// Returns true if the sort is a floating-point, calls isFloatSortImpl().
49 /// Returns the floating-point size, fails if the sort is not a floating-point
52 assert(isFloatSort() && "Not a floating-point sort!"); in getFloatSortSize()
83 /// Query the SMT solver and checks if a sort is floating-point.
156 // Returns an appropriate floating-point sort for the given bitwidth.
169 llvm_unreachable("Unsupported floating-point bitwidth!"); in getFloatSort()
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/freebsd/share/man/man3/
H A Dfpgetround.340 .Nd IEEE floating point interface
43 .Bd -literal
55 .Bd -literal
57 FP_PS, /* 24 bit (single-precision) */
59 FP_PD, /* 53 bit (double-precision) */
60 FP_PE /* 64 bit (extended-precision) */
67 .Bd -literal
90 When a floating point exception is detected, the exception sticky flag is
94 These routines allow both setting the floating point exception
97 In addition, they allow setting the floating point rounding mode
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/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellde/
H A Dfloating-point.json3-bit packed double precision floating-point instructions retired. Each count represents 2 computa…
12-bit packed single precision floating-point instructions retired. Each count represents 4 computa…
21-bit packed double precision floating-point instructions retired. Each count represents 4 computa…
30-bit packed single precision floating-point instructions retired. Each count represents 8 computa…
39 …nal double precision floating-point instructions retired. Applies to SSE* and AVX*scalar, double a…
48 …omputational packed floating-point instructions retired. Applies to SSE* and AVX*, packed, double …
57 …omputational scalar floating-point instructions retired. Applies to SSE* and AVX* scalar, double a…
66 …cision floating-point instructions retired. Each count represents 1 computation. Applies to SSE* …
75 …cision floating-point instructions retired. Each count represents 1 computation. Applies to SSE* …
84 …nal single precision floating-point instructions retired. Applies to SSE* and AVX*scalar, double a…
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/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/
H A Dfloating-point.json3-bit packed double precision floating-point instructions retired; some instructions will count twi…
12-bit packed single precision floating-point instructions retired; some instructions will count twi…
21-bit packed double precision floating-point instructions retired; some instructions will count twi…
30-bit packed single precision floating-point instructions retired; some instructions will count twi…
39floating-point instructions retired; some instructions will count twice as noted below. Applies to…
48floating-point instructions retired; some instructions will count twice as noted below. Applies to…
57floating-point instructions retired; some instructions will count twice as noted below. Each count…
66floating-point instructions retired; some instructions will count twice as noted below. Each coun…
75floating-point instructions retired; some instructions will count twice as noted below. Each coun…
84floating-point instructions retired; some instructions will count twice as noted below. Applies to…
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/freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/
H A Dfloating-point.json3-bit packed double precision floating-point instructions retired; some instructions will count twi…
12-bit packed single precision floating-point instructions retired; some instructions will count twi…
21-bit packed double precision floating-point instructions retired; some instructions will count twi…
30-bit packed single precision floating-point instructions retired; some instructions will count twi…
39floating-point instructions retired; some instructions will count twice as noted below. Applies to…
48floating-point instructions retired; some instructions will count twice as noted below. Applies to…
57floating-point instructions retired; some instructions will count twice as noted below. Each count…
66floating-point instructions retired; some instructions will count twice as noted below. Each coun…
75floating-point instructions retired; some instructions will count twice as noted below. Each coun…
84floating-point instructions retired; some instructions will count twice as noted below. Applies to…
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/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/
H A Dfloating-point.json3 …"BriefDescription": "Counts the number of floating point operations retired that required microcod…
14 …"BriefDescription": "Counts the number of floating point divide uops retired (x87 and SSE, includi…
93-bit packed double precision floating-point instructions retired; some instructions will count twi…
104-bit packed single precision floating-point instructions retired; some instructions will count twi…
115-bit packed double precision floating-point instructions retired; some instructions will count twi…
126-bit packed single precision floating-point instructions retired; some instructions will count twi…
137floating-point instructions retired; some instructions will count twice as noted below. Each coun…
148floating-point instructions retired; some instructions will count twice as noted below. Each coun…
/freebsd/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_trampoline_arm.S9 @ Word-aligned function entry point
15 @ Assume that "q" part of the floating-point registers is not used
21 PUSH {r1-r3,lr}
22 @ Save floating-point parameters of the instrumented function
23 VPUSH {d0-d7}
24 MOVW r1, #:lower16:_ZN6__xray19XRayPatchedFunctionE - (. + 16)
25 MOVT r1, #:upper16:_ZN6__xray19XRayPatchedFunctionE - (. + 12)
36 @ Restore floating-point parameters of the instrumented function
37 VPOP {d0-d7}
38 POP {r1-r3,pc}
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/freebsd/lib/libpmc/pmu-events/arch/arm64/
H A Dcommon-and-microarch.json129 "PublicDescription": "Attributable Level 1 data cache write-back",
132 "BriefDescription": "Attributable Level 1 data cache write-back"
147 "PublicDescription": "Attributable Level 2 data cache write-back",
150 "BriefDescription": "Attributable Level 2 data cache write-back"
273 "PublicDescription": "Access to another socket in a multi-socket system",
276 "BriefDescription": "Access to another socket in a multi-socket system"
303 … "PublicDescription": "Attributable memory read access to another socket in a multi-socket system",
306 … "BriefDescription": "Attributable memory read access to another socket in a multi-socket system"
309 …"PublicDescription": "Level 1 data cache long-latency read miss. The counter counts each memory r…
312 "BriefDescription": "Level 1 data cache long-latency read miss"
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/freebsd/lib/libc/softfloat/
H A Dsoftfloat.txt9 -------------------------------------------------------------------------------
12 SoftFloat is a software implementation of floating-point that conforms to
13 the IEC/IEEE Standard for Binary Floating-Point Arithmetic. As many as four
20 IEC/IEEE Floating-Point Standard. Details about the standard are available
24 -------------------------------------------------------------------------------
28 SoftFloat header files assume an ISO/ANSI-style C compiler. No attempt
29 has been made to accommodate compilers that are not ISO-conformant. In
33 Support for the extended double-precision and quadruple-precision formats
34 depends on a C compiler that implements 64-bit integer arithmetic. If the
38 precision, and 64-bit integers should be ignored.
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/freebsd/lib/libc/softfloat/bits64/
H A Dsoftfloat.c4 * This version hacked for use with gcc -msoft-float by bjh21.
12 * SOFTFLOAT_FOR_GCC - build only those functions necessary for GCC (with
13 * -msoft-float) to work. Include "softfloat-for-gcc.h" to get them
20 This C source file is part of the SoftFloat IEC/IEEE Floating-point
26 National Science Foundation under grant MIP-9311980. The original version
27 of this code was written as part of a project to build a fixed-point vector
48 #include "softfloat-for-gcc.h"
66 -------------------------------------------------------------------------------
67 Floating-point rounding mode, extended double-precision rounding precision,
69 -------------------------------------------------------------------------------
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/freebsd/lib/msun/man/
H A Dfenv.343 .Nd floating-point environment control
80 routines manipulate the floating-point environment,
82 .St -ieee754 .
84 Exception flags are set as side-effects of floating-point arithmetic
89 representing the five standard floating-point exceptions.
90 .Bl -tag -width ".Dv FE_DIVBYZERO"
92 A divide-by-zero exception occurs when the
95 For example, dividing a finite non-zero number by zero or computing
97 raises a divide-by-zero exception.
105 For instance, subtraction of like-signed infinities, division of zero by zero,
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/freebsd/lib/libc/softfloat/bits32/
H A Dsoftfloat.c4 * This version hacked for use with gcc -msoft-float by bjh21.
12 * SOFTFLOAT_FOR_GCC - build only those functions necessary for GCC (with
13 * -msoft-float) to work. Include "softfloat-for-gcc.h" to get them
19 * is defined to be a 64-bit integer rather than a structure. The
27 This C source file is part of the SoftFloat IEC/IEEE Floating-Point
33 National Science Foundation under grant MIP-9311980. The original version
34 of this code was written as part of a project to build a fixed-point vector
55 #include "softfloat-for-gcc.h"
73 -------------------------------------------------------------------------------
74 Floating-point rounding mode and exception flags.
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