| /linux/drivers/gpu/drm/amd/include/ivsrcid/dcn/ |
| H A D | irqsrcs_dcn_1_0.h | 192 #define DCN_1_0__SRCID__DC_DAC_A_AUTO_DET 0xA // DAC A auto - detection DACA_AUTODETECT_GEN… 309 #define DCN_1_0__SRCID__DC_DIGA_FAST_TRAINING_COMPLETE_INT 0xF // DIGA - Fast Training Complete… 312 #define DCN_1_0__SRCID__DC_DIGB_FAST_TRAINING_COMPLETE_INT 0xF // DIGB - Fast Training Complete… 315 #define DCN_1_0__SRCID__DC_DIGC_FAST_TRAINING_COMPLETE_INT 0xF // DIGC - Fast Training Complete… 318 #define DCN_1_0__SRCID__DC_DIGD_FAST_TRAINING_COMPLETE_INT 0xF // DIGD - Fast Training Complete… 321 #define DCN_1_0__SRCID__DC_DIGE_FAST_TRAINING_COMPLETE_INT 0xF // DIGE - Fast Training Complete… 324 #define DCN_1_0__SRCID__DC_DIGF_FAST_TRAINING_COMPLETE_INT 0xF // DIGF - Fast Training Complete… 574 #define DCN_1_0__SRCID__DC_D1_FORCE_CNT_W 0x1E // D1 : Force - count--w OTG1_IHC_FORCE_COUNT_NOW_IN… 577 #define DCN_1_0__SRCID__DC_D1_FORCE_VSYNC_NXT_LINE 0x1E // D1 : Force - Vsync - next - line OTG1_IH… 589 #define DCN_1_0__SRCID__OTG1_VERTICAL_INTERRUPT0_CONTROL 0x1E // D1 : OTG vertical interrupt 0 OTG1… [all …]
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| /linux/drivers/media/platform/st/sti/bdisp/ |
| H A D | bdisp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 #include <media/v4l2-ctrls.h> 13 #include <media/v4l2-device.h> 14 #include <media/v4l2-mem2mem.h> 16 #include <media/videobuf2-dma-contig.h> 21 * Max nb of nodes in node-list: 22 * - 2 nodes to handle wide 4K pictures 23 * - 2 nodes to handle two planes (Y & CbCr) */ 28 /* struct bdisp_ctrls - bdisp control set 29 * @hflip: horizontal flip [all …]
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| H A D | bdisp-hw.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include "bdisp-filter.h" 11 #include "bdisp-reg.h" 27 bool cconv; /* RGB - YUV conversion */ 28 bool hflip; /* Horizontal flip */ 29 bool vflip; /* Vertical flip */ 33 u16 v_inc; /* Vertical increment in 6.10 format */ 371 dev_dbg(bdisp->dev, "%s\n", __func__); in bdisp_hw_reset() 374 writel(0, bdisp->regs + BLT_ITM0); in bdisp_hw_reset() 377 writel(readl(bdisp->regs + BLT_CTL) | BLT_CTL_RESET, in bdisp_hw_reset() [all …]
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| /linux/include/uapi/drm/ |
| H A D | drm_mode.h | 5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA 6 * Copyright (c) 2007-2008 Intel Corporation 62 /* bit compatible with the xrandr RR_ definitions (bits 0-13) 176 * using the name->prop id lookup is the preferred method. 202 * using the name->prop id lookup is the preferred method. 222 * struct drm_mode_modeinfo - Display mode information. 229 * @vdisplay: vertical display size 230 * @vsync_start: vertical sync start 231 * @vsync_end: vertical sync end 232 * @vtotal: vertical tota [all...] |
| /linux/drivers/gpu/drm/renesas/rcar-du/ |
| H A D | rcar_du_crtc.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * R-Car Display Unit CRTCs 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 26 * struct rcar_du_crtc - the CRTC, representing a DU superposition processor 36 * @event: event to post when the pending page flip completes 37 * @flip_wait: wait queue used to signal page flip completion 39 * @vblank_wait: wait queue used to signal vertical blanking 40 * @vblank_count: number of vertical blanking interrupts to wait for 82 * struct rcar_du_crtc_state - Driver-specific CRTC state
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| H A D | rcar_du_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * R-Car Display Unit CRTCs 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 35 struct rcar_du_device *rcdu = rcrtc->dev; in rcar_du_crtc_read() 37 return rcar_du_read(rcdu, rcrtc->mmio_offset + reg); in rcar_du_crtc_read() 42 struct rcar_du_device *rcdu = rcrtc->dev; in rcar_du_crtc_write() 44 rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data); in rcar_du_crtc_write() 49 struct rcar_du_device *rcdu = rcrtc->dev; in rcar_du_crtc_clr() 51 rcar_du_write(rcdu, rcrtc->mmio_offset + reg, in rcar_du_crtc_clr() 52 rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr); in rcar_du_crtc_clr() [all …]
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| /linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | ronbo,rb070d30.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR X11) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Maxime Ripard <mripard@kernel.org> 19 power-gpios: 23 reset-gpios: 27 shlr-gpios: 28 description: GPIO used for the shlr pin (horizontal flip) 31 updn-gpios: 32 description: GPIO used for the updn pin (vertical flip) [all …]
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| /linux/include/media/i2c/ |
| H A D | ov772x.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 13 #define OV772X_FLAG_VFLIP (1 << 0) /* Vertical flip image */ 14 #define OV772X_FLAG_HFLIP (1 << 1) /* Horizontal flip image */ 29 #define OV772X_MANUAL_EDGE_CTRL 0x80 /* un-used bit of strength */ 49 * struct ov772x_camera_info - ov772x driver interface structure
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| /linux/drivers/media/platform/mediatek/mdp/ |
| H A D | mtk_mdp_core.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2015-2016 MediaTek Inc. 12 #include <media/v4l2-ctrls.h> 13 #include <media/v4l2-device.h> 14 #include <media/v4l2-mem2mem.h> 15 #include <media/videobuf2-core.h> 16 #include <media/videobuf2-dma-contig.h> 22 #define MTK_MDP_MODULE_NAME "mtk-mdp" 34 * struct mtk_mdp_pix_align - alignment of image 48 * struct mtk_mdp_fmt - the driver's internal color format data [all …]
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| H A D | mtk_mdp_ipi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2015-2016 MediaTek Inc. 26 * struct mdp_ipi_init - for AP_MDP_INIT 38 * struct mdp_ipi_comm - for AP_MDP_PROCESS, AP_MDP_DEINIT 54 * struct mdp_ipi_comm_ack - for VPU_MDP_DEINIT_ACK, VPU_MDP_PROCESS_ACK 70 * struct mdp_config - configured for source/destination image 76 * @h_stride : bytes in vertical 105 int32_t hflip; /* 1 will enable the flip */ 106 int32_t vflip; /* 1 will enable the flip */
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| /linux/include/linux/dma/ |
| H A D | xilinx_dma.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved. 11 #include <linux/dma-mapping.h> 15 * struct xilinx_vdma_config - VDMA Configuration structure 17 * @gen_lock: Whether in gen-lock mode 26 * @vflip_en: Vertical Flip enable
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| /linux/drivers/staging/media/tegra-video/ |
| H A D | vi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 16 #include <media/media-entity.h> 17 #include <media/v4l2-async.h> 18 #include <media/v4l2-ctrls.h> 19 #include <media/v4l2-device.h> 20 #include <media/v4l2-dev.h> 21 #include <media/v4l2-subdev.h> 22 #include <media/videobuf2-v4l2.h> 44 * struct tegra_vi_ops - Tegra VI operations 45 * @vi_enable: soc-specific operations needed to enable/disable the VI peripheral [all …]
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| /linux/Documentation/devicetree/bindings/dma/xilinx/ |
| H A D | xilinx_dma.txt | 11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source 12 address and a memory-mapped destination address. 19 - compatible: Should be one of- 20 "xlnx,axi-vdma-1.00.a" 21 "xlnx,axi-dma-1.00.a" 22 "xlnx,axi-cdma-1.00.a" 23 "xlnx,axi-mcdma-1.00.a" 24 - #dma-cells: Should be <1>, see "dmas" property below 25 - reg: Should contain VDMA registers location and length. 26 - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits). [all …]
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| /linux/drivers/gpu/drm/ |
| H A D | drm_rect.c | 2 * Copyright (C) 2011-2013 Intel Corporation 33 * drm_rect_intersect - intersect two rectangles 46 r1->x1 = max(r1->x1, r2->x1); in drm_rect_intersect() 47 r1->y1 = max(r1->y1, r2->y1); in drm_rect_intersect() 48 r1->x2 = min(r1->x2, r2->x2); in drm_rect_intersect() 49 r1->y2 = min(r1->y2, r2->y2); in drm_rect_intersect() 65 tmp = mul_u32_u32(src, dst - *clip); in clip_scaled() 78 * drm_rect_clip_scaled - perform a scaled clip operation 84 * the corresponding amounts, retaining the vertical and horizontal scaling 96 diff = clip->x1 - dst->x1; in drm_rect_clip_scaled() [all …]
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| /linux/include/uapi/linux/media/raspberrypi/ |
| H A D | pisp_be_config.h | 1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 5 * Copyright (C) 2021 - Raspberry Pi Ltd 98 * struct pisp_be_global_config - PiSP global enable bitmaps 112 * struct pisp_be_input_buffer_config - PiSP Back End input buffer 121 * struct pisp_be_dpc_config - PiS [all...] |
| /linux/drivers/gpu/drm/renesas/rz-du/ |
| H A D | rzg2l_du_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 60 /* ----------------------------------------------------------------------------- 66 const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode; in rzg2l_du_crtc_set_display_timing() 67 unsigned long mode_clock = mode->clock * 1000; in rzg2l_du_crtc_set_display_timing() 69 struct rzg2l_du_device *rcdu = rcrtc->dev; in rzg2l_du_crtc_set_display_timing() 71 clk_prepare_enable(rcrtc->rzg2l_clocks.dclk); in rzg2l_du_crtc_set_display_timing() 72 clk_set_rate(rcrtc->rzg2l_clocks.dclk, mode_clock); in rzg2l_du_crtc_set_display_timing() 75 | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DU_DITR0_VSPOL : 0) in rzg2l_du_crtc_set_display_timing() 76 | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DU_DITR0_HSPOL : 0)); in rzg2l_du_crtc_set_display_timing() 78 ditr1 = DU_DITR1_VSA(mode->vsync_end - mode->vsync_start) in rzg2l_du_crtc_set_display_timing() [all …]
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos4412-galaxy-s3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/leds/common.h> 11 #include "exynos4412-midas.dtsi" 19 led-controller { 21 flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>; 22 enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>; 24 pinctrl-names = "default", "host", "isp"; 25 pinctrl-0 = <&camera_flash_host>; 26 pinctrl-1 = <&camera_flash_host>; [all …]
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| /linux/drivers/gpu/drm/renesas/shmobile/ |
| H A D | shmob_drm_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * shmob_drm_crtc.c -- SH Mobile DRM CRTCs 11 #include <linux/media-bus-format.h> 43 /* ----------------------------------------------------------------------------- 44 * Page Flip 50 struct drm_device *dev = scrtc->base.dev; in shmob_drm_crtc_finish_page_flip() 53 spin_lock_irqsave(&dev->event_lock, flags); in shmob_drm_crtc_finish_page_flip() 54 event = scrtc->event; in shmob_drm_crtc_finish_page_flip() 55 scrtc->event = NULL; in shmob_drm_crtc_finish_page_flip() 57 drm_crtc_send_vblank_event(&scrtc->base, event); in shmob_drm_crtc_finish_page_flip() [all …]
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| /linux/drivers/media/usb/gspca/stv06xx/ |
| H A D | stv06xx_vv6410.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher 4 * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland 9 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600 10 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express 11 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam 12 * P/N 861075-0040: Sensor HDCS1000 ASIC 13 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB 14 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web 37 container_of(ctrl->handler, struct gspca_dev, ctrl_handler); in vv6410_s_ctrl() [all …]
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| /linux/drivers/media/usb/gspca/ |
| H A D | stk1135.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 45 /* -- read a register -- */ 48 struct usb_device *dev = gspca_dev->dev; in reg_r() 51 if (gspca_dev->usb_err < 0) in reg_r() 58 gspca_dev->usb_buf, 1, in reg_r() 62 index, gspca_dev->usb_buf[0]); in reg_r() 65 gspca_dev->usb_err = ret; in reg_r() 69 return gspca_dev->usb_buf[0]; in reg_r() 72 /* -- write a register -- */ 76 struct usb_device *dev = gspca_dev->dev; in reg_w() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 1 // SPDX-License-Identifier: MIT 214 * - with passed few options from dc->config 215 * - with dentist_vco_frequency from Clk Mgr (currently hardcoded, but might 217 * - with passed latency values (passed in ns units) in dc-> bb override for 219 * - with passed latencies from VBIOS (in 100_ns units) if available for 221 * - with number of DRAM channels from VBIOS (which differ for certain dGPU SKU 223 * - clocks levels with passed clk_table entries from Clk Mgr as reported by PM 232 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn35_update_bw_bounding_box_fpu() 234 dc->scratch.update_bw_bounding_box.clock_limits; in dcn35_update_bw_bounding_box_fpu() 240 dc->res_pool->res_cap->num_timing_generator; in dcn35_update_bw_bounding_box_fpu() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| H A D | dcn351_fpu.c | 1 /* SPDX-License-Identifier: MIT */ 248 * - with passed few options from dc->config 249 * - with dentist_vco_frequency from Clk Mgr (currently hardcoded, but might 251 * - with passed latency values (passed in ns units) in dc-> bb override for 253 * - with passed latencies from VBIOS (in 100_ns units) if available for 255 * - with number of DRAM channels from VBIOS (which differ for certain dGPU SKU 257 * - clocks levels with passed clk_table entries from Clk Mgr as reported by PM 266 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn351_update_bw_bounding_box_fpu() 268 dc->scratch.update_bw_bounding_box.clock_limits; in dcn351_update_bw_bounding_box_fpu() 274 dc->res_pool->res_cap->num_timing_generator; in dcn351_update_bw_bounding_box_fpu() [all …]
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| /linux/arch/x86/boot/ |
| H A D | video-mode.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* -*- linux-c -*- ------------------------------------------------------- * 5 * Copyright 2007-2008 rPath, Inc. - All Rights Reserved 7 * ----------------------------------------------------------------------- */ 10 * arch/i386/boot/video-mode.c 27 int do_restore; /* Screen contents changed during mode flip */ 42 if (card->unsafe == unsafe) { in probe_cards() 43 if (card->probe) in probe_cards() 44 card->nmodes = card->probe(); in probe_cards() 46 card->nmodes = 0; in probe_cards() [all …]
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| /linux/drivers/media/platform/samsung/s3c-camif/ |
| H A D | camif-core.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 20 #include <media/media-entity.h> 21 #include <media/v4l2-ctrls.h> 22 #include <media/v4l2-dev.h> 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-mediabus.h> 25 #include <media/videobuf2-v4l2.h> 26 #include <media/drv-intf/s3c_camif.h> 28 #define S3C_CAMIF_DRIVER_NAME "s3c-camif" 39 #define S3C2450_CAMIF_IP_REV 0x30 /* 3.0 - not implemented, not tested */ [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_hw_types.h | 41 * Note: do *not* add any types which are *not* used for HW programming - this 245 * in cases such as Stereo 3D, Planar YUV, etc. Other per-flip attributes such 253 /* TODO: add flip duration for FreeSync */ 395 * 0x0 - DISPLAY_MICRO_TILING 396 * 0x1 - THIN_MICRO_TILING 397 * 0x2 - DEPTH_MICRO_TILING 398 * 0x3 - ROTATED_MICRO_TILING 560 * enum dc_cursor_color_format - DC cursor programming mode 783 it is positive polarity --reversed with dal1 or video bios define*/ 785 it is positive polarity --reversed with dal1 or video bios define*/ [all …]
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