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/linux/arch/s390/kernel/
H A Dfpu.c1 // SPDX-License-Identifier: GPL-2.0
3 * In-kernel vector facility support functions
15 void __kernel_fpu_begin(struct kernel_fpu *state, int flags) in __kernel_fpu_begin() argument
17 __vector128 *vxrs = state->vxrs; in __kernel_fpu_begin()
18 int mask; in __kernel_fpu_begin() local
24 flags &= state->hdr.mask; in __kernel_fpu_begin()
25 if (flags & KERNEL_FPC) in __kernel_fpu_begin()
26 fpu_stfpc(&state->hdr.fpc); in __kernel_fpu_begin()
28 if (flags & KERNEL_VXR_LOW) in __kernel_fpu_begin()
32 mask = flags & KERNEL_VXR; in __kernel_fpu_begin()
[all …]
/linux/arch/mips/lib/
H A Dbitops.c6 * Copyright (c) 1994-1997, 99, 2000, 06, 07 Ralf Baechle (ralf@linux-mips.org)
16 * __mips_set_bit - Atomically set a bit in memory. This is called by
25 unsigned long mask; in __mips_set_bit() local
26 unsigned long flags; in __mips_set_bit() local
28 mask = 1UL << bit; in __mips_set_bit()
29 raw_local_irq_save(flags); in __mips_set_bit()
30 *a |= mask; in __mips_set_bit()
31 raw_local_irq_restore(flags); in __mips_set_bit()
37 * __mips_clear_bit - Clears a bit in memory. This is called by clear_bit() if
46 unsigned long mask; in __mips_clear_bit() local
[all …]
/linux/arch/loongarch/include/asm/
H A Dirqflags.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
16 u32 flags = CSR_CRMD_IE; in arch_local_irq_enable() local
17 register u32 mask asm("t0") = CSR_CRMD_IE; in arch_local_irq_enable()
20 "csrxchg %[val], %[mask], %[reg]\n\t" in arch_local_irq_enable()
21 : [val] "+r" (flags) in arch_local_irq_enable()
22 : [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD) in arch_local_irq_enable()
28 u32 flags = 0; in arch_local_irq_disable() local
29 register u32 mask asm("t0") = CSR_CRMD_IE; in arch_local_irq_disable()
32 "csrxchg %[val], %[mask], %[reg]\n\t" in arch_local_irq_disable()
[all …]
/linux/arch/powerpc/platforms/85xx/
H A Dsocrates_fpga_pic.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #define SOCRATES_FPGA_IRQ_MASK ((1 << SOCRATES_FPGA_NUM_IRQS) - 1)
68 unsigned long flags; in socrates_fpga_pic_get_irq() local
79 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); in socrates_fpga_pic_get_irq()
81 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); in socrates_fpga_pic_get_irq()
82 for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) { in socrates_fpga_pic_get_irq()
104 chip->irq_eoi(&desc->irq_data); in socrates_fpga_pic_cascade()
109 unsigned long flags; in socrates_fpga_pic_ack() local
111 uint32_t mask; in socrates_fpga_pic_ack() local
114 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); in socrates_fpga_pic_ack()
[all …]
/linux/arch/mips/kernel/
H A Dirq-gt641xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org>
15 #define GT641XX_IRQ_TO_BIT(irq) (1U << (irq - GT641XX_IRQ_BASE))
21 unsigned long flags; in ack_gt641xx_irq() local
24 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags); in ack_gt641xx_irq()
26 cause &= ~GT641XX_IRQ_TO_BIT(d->irq); in ack_gt641xx_irq()
28 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags); in ack_gt641xx_irq()
33 unsigned long flags; in mask_gt641xx_irq() local
34 u32 mask; in mask_gt641xx_irq() local
36 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags); in mask_gt641xx_irq()
[all …]
/linux/sound/soc/sof/
H A Dops.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
16 u32 mask, u32 value) in snd_sof_pci_update_bits_unlocked() argument
18 struct pci_dev *pci = to_pci_dev(sdev->dev); in snd_sof_pci_update_bits_unlocked()
24 dev_dbg(sdev->dev, "Debug PCIR: %8.8x at %8.8x\n", old & mask, offse in snd_sof_pci_update_bits_unlocked()
39 snd_sof_pci_update_bits(struct snd_sof_dev * sdev,u32 offset,u32 mask,u32 value) snd_sof_pci_update_bits() argument
41 unsigned long flags; snd_sof_pci_update_bits() local
52 snd_sof_dsp_update_bits_unlocked(struct snd_sof_dev * sdev,u32 bar,u32 offset,u32 mask,u32 value) snd_sof_dsp_update_bits_unlocked() argument
72 snd_sof_dsp_update_bits64_unlocked(struct snd_sof_dev * sdev,u32 bar,u32 offset,u64 mask,u64 value) snd_sof_dsp_update_bits64_unlocked() argument
91 snd_sof_dsp_update_bits(struct snd_sof_dev * sdev,u32 bar,u32 offset,u32 mask,u32 value) snd_sof_dsp_update_bits() argument
93 unsigned long flags; snd_sof_dsp_update_bits() local
105 snd_sof_dsp_update_bits64(struct snd_sof_dev * sdev,u32 bar,u32 offset,u64 mask,u64 value) snd_sof_dsp_update_bits64() argument
107 unsigned long flags; snd_sof_dsp_update_bits64() local
120 snd_sof_dsp_update_bits_forced_unlocked(struct snd_sof_dev * sdev,u32 bar,u32 offset,u32 mask,u32 value) snd_sof_dsp_update_bits_forced_unlocked() argument
135 snd_sof_dsp_update_bits_forced(struct snd_sof_dev * sdev,u32 bar,u32 offset,u32 mask,u32 value) snd_sof_dsp_update_bits_forced() argument
137 unsigned long flags; snd_sof_dsp_update_bits_forced() local
[all...]
/linux/arch/powerpc/platforms/powermac/
H A Dpfunc_core.c1 // SPDX-License-Identifier: GPL-2.0-only
84 while(bytes--) {
99 if ((cmd->cmdend - cmd->cmdptr) < 4) { in pmf_next32()
100 cmd->error = 1; in pmf_next32()
103 value = *((u32 *)cmd->cmdptr); in pmf_next32()
104 cmd->cmdptr += 4; in pmf_next32()
111 if ((cmd->cmdend - cmd->cmdptr) < count) { in pmf_next_blob()
112 cmd->error = 1; in pmf_next_blob()
115 value = cmd->cmdptr; in pmf_next_blob()
116 cmd->cmdptr += count; in pmf_next_blob()
[all …]
H A Dpfunc_base.c1 // SPDX-License-Identifier: GPL-2.0
29 unsigned int irq = irq_of_parse_and_map(func->node, 0); in macio_do_gpio_irq_enable()
31 return -EINVAL; in macio_do_gpio_irq_enable()
32 return request_irq(irq, macio_gpio_irq, 0, func->node->name, func); in macio_do_gpio_irq_enable()
37 unsigned int irq = irq_of_parse_and_map(func->node, 0); in macio_do_gpio_irq_disable()
39 return -EINVAL; in macio_do_gpio_irq_disable()
44 static int macio_do_gpio_write(PMF_STD_ARGS, u8 value, u8 mask) in macio_do_gpio_write() argument
46 u8 __iomem *addr = (u8 __iomem *)func->driver_data; in macio_do_gpio_write()
47 unsigned long flags; in macio_do_gpio_write() local
51 if (args && args->count && !args->u[0].v) in macio_do_gpio_write()
[all …]
/linux/drivers/ssb/
H A Dembedded.c5 * Copyright 2005-2008, Broadcom Corporation
6 * Copyright 2006-2008, Michael Buesch <m@bues.ch>
7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
25 if (ssb_chipco_available(&bus->chipco)) { in ssb_watchdog_timer_set()
26 ssb_chipco_watchdog_timer_set(&bus->chipco, ticks); in ssb_watchdog_timer_set()
29 if (ssb_extif_available(&bus->extif)) { in ssb_watchdog_timer_set()
30 ssb_extif_watchdog_timer_set(&bus->extif, ticks); in ssb_watchdog_timer_set()
33 return -ENODEV; in ssb_watchdog_timer_set()
42 if (ssb_chipco_available(&bus->chipco)) { in ssb_watchdog_register()
43 wdt.driver_data = &bus->chipco; in ssb_watchdog_register()
[all …]
H A Ddriver_extif.c22 return ssb_read32(extif->dev, offset); in extif_read32()
27 ssb_write32(extif->dev, offset, value); in extif_write32()
31 u32 mask, u32 value) in extif_write32_masked() argument
33 value &= mask; in extif_write32_masked()
34 value |= extif_read32(extif, offset) & ~mask; in extif_write32_masked()
143 if (!extif->dev) in ssb_extif_init()
145 spin_lock_init(&extif->gpio_lock); in ssb_extif_init()
148 u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask) in ssb_extif_gpio_in() argument
150 return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask; in ssb_extif_gpio_in()
153 u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value) in ssb_extif_gpio_out() argument
[all …]
/linux/drivers/net/ethernet/netronome/nfp/flower/
H A Dmatch.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /* Copyright (C) 2017-2018 Netronome Systems, Inc. */
15 ext->nfp_flow_key_layer = key_type; in nfp_flower_compile_meta()
16 ext->mask_id = ~0; in nfp_flower_compile_meta()
18 msk->nfp_flow_key_layer = key_type; in nfp_flower_compile_meta()
19 msk->mask_id = ~0; in nfp_flower_compile_meta()
36 match.key->vlan_priority) | in nfp_flower_compile_tci()
38 match.key->vlan_id); in nfp_flower_compile_tci()
42 match.mask->vlan_priority) | in nfp_flower_compile_tci()
44 match.mask->vlan_id); in nfp_flower_compile_tci()
[all …]
/linux/arch/x86/kernel/
H A Di8259.c1 // SPDX-License-Identifier: GPL-2.0
45 * This contains the irq mask for both 8259A irq controllers,
50 * Not all IRQs can be routed through the IO-APIC, eg. on certain (older)
51 * boards the timer interrupt is not really connected to any IO-APIC pin,
54 * Any '1' bit in this mask means the IRQ is routed through the IO-APIC.
62 unsigned int mask = 1 << irq; in mask_8259A_irq() local
63 unsigned long flags; in mask_8259A_irq() local
65 raw_spin_lock_irqsave(&i8259A_lock, flags); in mask_8259A_irq()
66 cached_irq_mask |= mask; in mask_8259A_irq()
71 raw_spin_unlock_irqrestore(&i8259A_lock, flags); in mask_8259A_irq()
[all …]
/linux/drivers/bcma/
H A Ddriver_chipcommon.c7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
19 u32 mask, u32 value) in bcma_cc_write32_masked() argument
21 value &= mask; in bcma_cc_write32_masked()
22 value |= bcma_cc_read32(cc, offset) & ~mask; in bcma_cc_write32_masked()
30 if (cc->capabilities & BCMA_CC_CAP_PMU) in bcma_chipco_get_alp_clock()
39 struct bcma_bus *bus = cc->core->bus; in bcma_core_cc_has_pmu_watchdog()
41 if (cc->capabilities & BCMA_CC_CAP_PMU) { in bcma_core_cc_has_pmu_watchdog()
42 if (bus->chipinfo.id == BCMA_CHIP_ID_BCM53573) { in bcma_core_cc_has_pmu_watchdog()
43 WARN(bus->chipinfo.rev <= 1, "No watchdog available\n"); in bcma_core_cc_has_pmu_watchdog()
58 struct bcma_bus *bus = cc->core->bus; in bcma_chipco_watchdog_get_max_timer()
[all …]
/linux/drivers/clk/ti/
H A Dmux.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Tero Kristo <t-kristo@ti.com>
10 #include <linux/clk-provider.h>
28 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent()
34 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
35 val &= mux->mask; in ti_clk_mux_get_parent()
37 if (mux->table) { in ti_clk_mux_get_parent()
41 if (mux->table[i] == val) in ti_clk_mux_get_parent()
43 return -EINVAL; in ti_clk_mux_get_parent()
46 if (val && (mux->flags & CLK_MUX_INDEX_BIT)) in ti_clk_mux_get_parent()
[all …]
/linux/arch/powerpc/sysdev/
H A Dipic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
35 .mask = IPIC_SIMSR_H,
42 .mask = IPIC_SIMSR_H,
49 .mask = IPIC_SIMSR_H,
56 .mask = IPIC_SIMSR_H,
63 .mask = IPIC_SIMSR_H,
70 .mask = IPIC_SIMSR_H,
77 .mask = IPIC_SIMSR_H,
84 .mask = IPIC_SIMSR_H,
91 .mask = IPIC_SIMSR_H,
[all …]
/linux/arch/sparc/lib/
H A Datomic32.c1 // SPDX-License-Identifier: GPL-2.0
3 * atomic32.c: 32-bit atomic_t implementation
8 * Based on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf
17 #define ATOMIC_HASH(a) (&__atomic_hash[(((unsigned long)a)>>8) & (ATOMIC_HASH_SIZE-1)])
20 [0 ... (ATOMIC_HASH_SIZE-1)] = __SPIN_LOCK_UNLOCKED(__atomic_hash)
35 unsigned long flags; \
36 spin_lock_irqsave(ATOMIC_HASH(v), flags); \
38 ret = v->counter; \
39 v->counter c_op i; \
41 spin_unlock_irqrestore(ATOMIC_HASH(v), flags); \
[all …]
/linux/arch/parisc/include/asm/
H A Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 unsigned long mask = BIT_MASK(nr); in set_bit() local
24 unsigned long flags; in set_bit() local
27 _atomic_spin_lock_irqsave(addr, flags); in set_bit()
28 *addr |= mask; in set_bit()
29 _atomic_spin_unlock_irqrestore(addr, flags); in set_bit()
34 unsigned long mask = BIT_MASK(nr); in clear_bit() local
35 unsigned long flags; in clear_bit() local
38 _atomic_spin_lock_irqsave(addr, flags); in clear_bit()
39 *addr &= ~mask; in clear_bit()
[all …]
/linux/io_uring/
H A Dpoll.c1 // SPDX-License-Identifier: GPL-2.0
49 * We usually have 1-2 refs taken, 128 is more than enough and we want to
61 unsigned long priv = (unsigned long)wqe->private; in wqe_to_req()
68 unsigned long priv = (unsigned long)wqe->private; in wqe_is_double()
82 v = atomic_fetch_or(IO_POLL_RETRY_FLAG, &req->poll_refs); in io_poll_get_ownership_slowpath()
85 return !(atomic_fetch_inc(&req->poll_refs) & IO_POLL_REF_MASK); in io_poll_get_ownership_slowpath()
89 * If refs part of ->poll_refs (see IO_POLL_REF_MASK) is 0, it's free. We can
96 if (unlikely((unsigned int)atomic_read(&req->poll_refs) >= IO_POLL_REF_BIAS)) in io_poll_get_ownership()
98 return !(atomic_fetch_inc(&req->poll_refs) & IO_POLL_REF_MASK); in io_poll_get_ownership()
103 atomic_or(IO_POLL_CANCEL_FLAG, &req->poll_refs); in io_poll_mark_cancelled()
[all …]
/linux/drivers/clk/
H A Dclk-mux.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
10 #include <linux/clk-provider.h>
21 * prepare - clk_prepare only ensures that parents are prepared
22 * enable - clk_enable only ensures that parents are enabled
23 * rate - rate is only affected by parent switching. No clk_set_rate support
24 * parent - parent is adjustable through clk_set_parent
29 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_readl()
30 return ioread32be(mux->reg); in clk_mux_readl()
32 return readl(mux->reg); in clk_mux_readl()
[all …]
/linux/arch/arm/include/asm/
H A Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 unsigned long flags; in ____atomic_set_bit() local
39 unsigned long mask = BIT_MASK(bit); in ____atomic_set_bit() local
43 raw_local_irq_save(flags); in ____atomic_set_bit()
44 *p |= mask; in ____atomic_set_bit()
45 raw_local_irq_restore(flags); in ____atomic_set_bit()
50 unsigned long flags; in ____atomic_clear_bit() local
51 unsigned long mask = BIT_MASK(bit); in ____atomic_clear_bit() local
55 raw_local_irq_save(flags); in ____atomic_clear_bit()
56 *p &= ~mask; in ____atomic_clear_bit()
[all …]
/linux/drivers/pinctrl/starfive/
H A Dpinctrl-starfive-jh7110.c1 // SPDX-License-Identifier: GPL-2.0
27 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
30 #include "../pinctrl-utils.h"
33 #include "pinctrl-starfive-jh7110.h"
52 * | 31 - 24 | 23 - 16 | 15 - 10 | 9 - 8 | 7 - 0 |
100 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_pin_dbg_show()
102 seq_printf(s, "%s", dev_name(pctldev->dev)); in jh7110_pin_dbg_show()
104 if (pin < sfp->gc.ngpio) { in jh7110_pin_dbg_show()
107 u32 dout = readl_relaxed(sfp->base + info->dout_reg_base + offset); in jh7110_pin_dbg_show()
108 u32 doen = readl_relaxed(sfp->base + info->doen_reg_base + offset); in jh7110_pin_dbg_show()
[all …]
/linux/include/linux/pds/
H A Dpds_intr.h1 /* SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB) OR BSD-2-Clause */
10 * device units. Use @identity->intr_coal_mult
11 * and @identity->intr_coal_div to convert from
25 * @mask: Interrupt mask. When @mask=1 the interrupt
27 * @mask=0 the interrupt resource will send an
41 * @flags: Interrupt control flags
42 * @unmask -- When this bit is written with a 1
43 * the interrupt resource will set mask=0.
44 * @coal_timer_reset -- When this
49 * @mask_on_assert: Automatically mask on assertion. When
[all …]
/linux/drivers/dma/lgm/
H A Dlgm-dma.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016 - 2020 Intel Corporation.
10 #include <linux/dma-mapping.h>
23 #include "../virt-dma.h"
25 #define DRIVER_NAME "lgm-dma"
68 #define DMA_MAX_CLASS (SZ_32 - 1)
142 #define DMA_ORRC_MAX_CNT (SZ_32 - 1)
149 #define DMA_MAX_DESC_NUM (SZ_8K - 1)
150 #define DMA_CHAN_BOFF_MAX (SZ_256 - 1)
154 #define DMA_HDR_LEN_MAX (SZ_16K - 1)
[all …]
/linux/drivers/net/ethernet/intel/igc/
H A Digc_leds.c1 // SPDX-License-Identifier: GPL-2.0
50 u32 *mask, u32 *shift, u32 *blink) in igc_led_select() argument
54 *mask = IGC_LEDCTL_LED0_MODE_MASK; in igc_led_select()
59 *mask = IGC_LEDCTL_LED1_MODE_MASK; in igc_led_select()
64 *mask = IGC_LEDCTL_LED2_MODE_MASK; in igc_led_select()
69 *mask = *shift = *blink = 0; in igc_led_select()
70 netdev_err(adapter->netdev, "Unknown LED %d selected!\n", led); in igc_led_select()
77 u32 shift, mask, blink_bit, ledctl; in igc_led_set() local
78 struct igc_hw *hw = &adapter->hw; in igc_led_set()
80 igc_led_select(adapter, led, &mask, &shift, &blink_bit); in igc_led_set()
[all …]
/linux/drivers/net/ethernet/aquantia/atlantic/
H A Daq_utils.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
14 static inline void aq_utils_obj_set(atomic_t *flags, u32 mask) in aq_utils_obj_set() argument
19 flags_old = atomic_read(flags); in aq_utils_obj_set()
20 flags_new = flags_old | (mask); in aq_utils_obj_set()
21 } while (atomic_cmpxchg(flags, flags_old, flags_new) != flags_old); in aq_utils_obj_set()
24 static inline void aq_utils_obj_clear(atomic_t *flags, u32 mask) in aq_utils_obj_clear() argument
29 flags_old = atomic_read(flags); in aq_utils_obj_clear()
30 flags_new = flags_old & ~(mask); in aq_utils_obj_clear()
31 } while (atomic_cmpxchg(flags, flags_old, flags_new) != flags_old); in aq_utils_obj_clear()
[all …]

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