| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | adi,ad7606.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
22 - adi,ad7605-4
23 - adi,ad7606-4
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | atmel-usart.txt | 4 - compatible: Should be one of the following:
5 - "atmel,at91rm9200-usart"
6 - "atmel,at91sam9260-usart"
7 - "microchip,sam9x60-usart"
8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
11 - reg: Should contain registers location and length
12 - interrupts: Should contain interrupt
13 - clock-names: tuple listing input clock names.
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| H A D | google,cros-ec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benson Leung <bleung@chromium.org>
11 - Guenter Roeck <groeck@chromium.org>
22 - description:
24 const: google,cros-ec-i2c
25 - description:
27 const: google,cros-ec-spi
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| /freebsd/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | gpio.txt | 4 1) gpios property
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
9 for compatibility reasons (resolving to the "gpios" property), it is not allowed
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
15 cases should they contain more than one. If your device uses several GPIOs with
17 meaningful name. The only case where an array of GPIOs is accepted is when
18 several GPIOs serve the same function (e.g. a parallel data line).
20 The exact purpose of each gpios property must be documented in the device tree
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| H A D | nvidia,tegra186-gpio.txt | 21 registers to do so. Code which simply wishes to read or write GPIO data does not
30 Tegra HW documentation describes a unified naming convention for all GPIOs
32 a number of GPIOs. Thus, each GPIO is named according to an alphabetical port
37 implemented GPIOs within each port varies. GPIO registers within a controller
42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h>
43 describes the port-level mapping. In that file, the naming convention for ports
49 represents the aggregate status for all GPIOs within a set of ports. Thus, the
52 both the overall controller HW module and the sets-of-ports as "controllers".
56 interrupt signals generated by a set-of-ports. The intent is for each generated
59 per-port-set signals is reported via a separate register. Thus, a driver needs
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| H A D | nvidia,tegra186-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
33 GPIO data does not need access to these registers.
41 Tegra HW documentation describes a unified naming convention for all GPIOs
43 control a number of GPIOs. Thus, each GPIO is named according to an
48 of implemented GPIOs within each port varies. GPIO registers within a
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| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | thine,thc63lvd1024.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 streams to parallel data outputs. The chip supports single/dual input/output
19 Single or dual operation mode, output data mapping and DDR output modes are
34 even-numbered pixels are received on port@0 and odd-numbered pixels on
37 When operating in single output mode all pixels are output from the first
45 description: First LVDS input port
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| H A D | ti,sn65dsi86.txt | 2 --------------------------------
8 - compatible: Must be "ti,sn65dsi86"
9 - reg: i2c address of the chip, 0x2d as per datasheet
10 - enable-gpios: gpio specification for bridge_en pin (active high)
12 - vccio-supply: A 1.8V supply that powers up the digital IOs.
13 - vpll-supply: A 1.8V supply that powers up the displayport PLL.
14 - vcca-supply: A 1.2V supply that powers up the analog circuits.
15 - vcc-supply: A 1.2V supply that powers up the digital core.
18 - interrupts-extended: Specifier for the SN65DSI86 interrupt line.
20 - gpio-controller: Marks the device has a GPIO controller.
[all …]
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| H A D | sii902x.txt | 4 - compatible: "sil,sii9022"
5 - reg: i2c address of the bridge
8 - interrupts: describe the interrupt line used to inform the host
10 - reset-gpios: OF device-tree gpio specification for RST_N pin.
11 - iovcc-supply: I/O Supply Voltage (1.8V or 3.3V)
12 - cvcc12-supply: Digital Core Supply Voltage (1.2V)
15 - #sound-dai-cells: <0> or <1>. <0> if only i2s or spdif pin
18 - sil,i2s-data-lanes: Array of up to 4 integers with values of 0-3
20 audio fifo. The first integer selects i2s audio pin for the
21 first audio fifo#0 (HDMI channels 1&2), second for fifo#1
[all …]
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| H A D | ti,sn65dsi86.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
40 vpll-supply:
43 vcca-supply:
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| H A D | sil,sii9022.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Boris Brezillon <bbrezillon@kernel.org>
15 - items:
16 - enum:
17 - sil,sii9022-cpi # CEC Programming Interface
18 - sil,sii9022-tpi # Transmitter Programming Interface
19 - const: sil,sii9022
20 - const: sil,sii9022
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| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | exynos-dw-mshc.txt | 7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
25 - "axis,artpec8-dw-mshc": for controllers with ARTPEC-8 specific
28 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
32 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
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| H A D | arm,pl18x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
[all …]
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| H A D | fsl-imx-esdhc.txt | 7 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
10 - compatible : Should be "fsl,<chip>-esdhc", the supported chips include
11 "fsl,imx25-esdhc"
12 "fsl,imx35-esdhc"
13 "fsl,imx51-esdhc"
14 "fsl,imx53-esdhc"
15 "fsl,imx6q-usdhc"
16 "fsl,imx6sl-usdhc"
17 "fsl,imx6sx-usdhc"
18 "fsl,imx6ull-usdhc"
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/w1/ |
| H A D | w1-gpio.txt | 1 w1-gpio devicetree bindings
5 - compatible: "w1-gpio"
6 - gpios: one or two GPIO specs:
7 - the first one is used as data I/O pin
8 - the second one is optional. If specified, it is used as
13 - linux,open-drain: if specified, the data pin is considered in
14 open-drain mode.
21 compatible = "w1-gpio";
22 gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
|
| /freebsd/sys/dev/gpio/ |
| H A D | ofw_gpiobus.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
71 rv = ofw_bus_parse_xref_list_alloc(cnode, prop_name, "#gpio-cells", in gpio_pin_get_by_ofw_propidx()
113 return (gpio_pin_get_by_ofw_propidx(consumer, node, "gpios", idx, pin)); in gpio_pin_get_by_ofw_idx()
133 rv = ofw_bus_find_string_index(node, "gpio-names", name, &idx); in gpio_pin_get_by_ofw_name()
175 devi = &dinfo->opd_dinfo; in ofw_gpiobus_add_fdt_child()
176 for (i = 0; i < devi->npins; i++) in ofw_gpiobus_add_fdt_child()
177 GPIOBUS_PIN_SETNAME(bus, devi->pins[i], in ofw_gpiobus_add_fdt_child()
198 if (node != -1) in ofw_gpiobus_register_provider()
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| H A D | gpioiic.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
62 {"i2c-gpio", true}, /* Standard devicetree compat string */
83 node = ofw_bus_get_node(sc->dev); in gpioiic_setup_fdt_pins()
86 * Historically, we used the first two array elements of the gpios in gpioiic_setup_fdt_pins()
87 * property. The modern bindings specify separate scl-gpios and in gpioiic_setup_fdt_pins()
88 * sda-gpios properties. We cope with whichever is present. in gpioiic_setup_fdt_pins()
90 if (OF_hasprop(node, "gpios")) { in gpioiic_setup_fdt_pins()
91 if ((err = gpio_pin_get_by_ofw_idx(sc->dev, node, in gpioiic_setup_fdt_pins()
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | davicom-dm9000.txt | 4 - compatible = "davicom,dm9000";
5 - reg : physical addresses and sizes of registers, must contain 2 entries:
6 first entry : address register,
7 second entry : data register.
8 - interrupts : interrupt specifier specific to interrupt controller
11 - davicom,no-eeprom : Configuration EEPROM is not available
12 - davicom,ext-phy : Use external PHY
13 - reset-gpios : phandle of gpio that will be used to reset chip during probe
14 - vcc-supply : phandle of regulator that will be used to enable power to chip
21 interrupt-parent = <&gpn>;
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| /freebsd/share/man/man4/ |
| H A D | gpioiic.4 | 19 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 .Nd GPIO I2C bit-banging device driver
35 .Bd -ragged -offset indent
45 .Bd -literal -offset indent
51 driver provides an IIC bit-banging interface using two GPIO pins for the
59 They are driven to '0' or switched to input mode (Hi-Z/tri-state), and
67 .Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
77 bit-banging bus.
81 (any other bits - i.e., pins - will be ignored).
103 conforms to the standard bindings document i2c/i2c-gpio.yaml.
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| H A D | gpioled.4 | 19 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 .Bd -ragged -offset indent
59 .Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
71 (any other bits - i.e., pins - will be ignored).
78 .Bl -tag
90 If set to -1, the LED will be kept in its original state.
100 .Bd -literal
103 gpio-controller;
108 gpios = <&gpio 16 2 0>; /* GPIO pin 16. */
114 gpios = <&gpio 17 2 0>; /* GPIO pin 17. */
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| H A D | owc.4 | 18 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 .Nd Dallas Semiconductor 1-Wire Controller
35 module implements Dallas Semiconductor 1-Wire signaling.
38 driver 1-Wire bus protocol.
41 device implements the Link Layer of the 1-Wire bus protocol stack.
47 Strong pull-up functionality needed to support parasitic mode is not
50 To enable 1-Wire for FDT systems requires modifying the DTS for your
52 .Bd -literal
56 compatible = "w1-gpio";
57 gpios = <&gpio 4 1>;
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| H A D | gpiokeys.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause
21 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 .Bd -ragged -offset indent
46 .Bd -literal -offset indent
70 .Bd -literal
76 compatible = "gpio-keys";
81 gpios = <&gpio 0 3 GPIO_ACTIVE_LOW>
87 gpios = <&gpio 0 4 GPIO_ACTIVE_LOW>
94 .Va gpios
96 .Pa /usr/src/sys/dts/bindings-gpio.txt .
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | ssd1307fb.txt | 4 - compatible: Should be "solomon,<chip>fb-<bus>". The only supported bus for
7 - reg: Should contain address of the controller on the I2C bus. Most likely
9 - pwm: Should contain the pwm to use according to the OF device tree PWM
11 - solomon,height: Height in pixel of the screen driven by the controller
12 - solomon,width: Width in pixel of the screen driven by the controller
13 - solomon,page-offset: Offset of pages (band of 8 pixels) that the screen is
17 - reset-gpios: The GPIO used to reset the OLED display, if available. See
19 - vbat-supply: The supply for VBAT
20 - solomon,segment-no-remap: Display needs normal (non-inverted) data column
22 - solomon,col-offset: Offset of columns (COL/SEG) that the screen is mapped to.
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| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | thine,thp7312.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Elder <paul.elder@@ideasonboard.com>
17 MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2
19 interleaved data streams with data types or multiple virtual channel
23 - $ref: /schemas/media/video-interface-devices.yaml#
36 thine,boot-mode:
43 0 is for the SPI/2-wire slave boot, 1 is for the SPI master boot (from
46 reset-gpios:
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| H A D | maxim,max96712.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Quad GMSL2 to CSI-2 Deserializer with GMSL1 Compatibility
11 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
15 CSI-2 D-PHY or C-PHY formatted outputs. The device allows each link to
16 simultaneously transmit bidirectional control-channel data while forward
18 four remotely located sensors using industry-standard coax or STP
23 MAX96712 can be paired with first-generation 3.12Gbps or 1.5Gbps GMSL1
34 enable-gpios: true
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