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/linux/Documentation/devicetree/bindings/mmc/
H A Dsynopsys-dw-mshc-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: mmc-controller.yaml#
13 - Ulf Hansson <ulf.hansson@linaro.org>
20 reset-names:
23 clock-frequency:
29 fifo-depth:
31 The maximum size of the tx/rx fifo's. If this property is not
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H A Dstarfive,jh7110-mmc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: synopsys-dw-mshc-common.yaml#
17 - William Qiu <william.qiu@starfivetech.com>
21 const: starfive,jh7110-mmc
28 - description: biu clock
29 - description: ciu clock
31 clock-names:
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H A Dsynopsys-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
16 - altr,socfpga-dw-mshc
17 - img,pistachio-dw-mshc
18 - snps,dw-mshc
33 clock-names:
35 - const: biu
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/linux/drivers/iio/imu/inv_icm42600/
H A Dinv_icm42600_buffer.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 * struct inv_icm42600_fifo - FIFO state variables
20 * @on: reference counter for FIFO on.
21 * @en: bits field of INV_ICM42600_SENSOR_* for FIFO EN bits.
22 * @period: FIFO internal period.
23 * @watermark: watermark configuration values for accel and gyro.
24 * @count: number of bytes in the FIFO data buffer.
25 * @nb: gyro, accel and total samples in the FIFO data buffer.
26 * @data: FIFO data buffer aligned for DMA (2kB + 32 bytes of read cache).
37 } watermark; member
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/linux/drivers/net/wireless/intel/iwlwifi/fw/api/
H A Dsf.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
10 /* Smart Fifo state */
19 /* Smart Fifo possible scenario */
32 /* smart FIFO default values */
39 /* SF Scenarios timers for default configuration (aligned to 32 uSec) */
51 /* SF Scenarios timers for BSS MAC configuration (aligned to 32 uSec) */
68 * struct iwl_sf_cfg_cmd - Smart Fifo configuration command.
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/linux/arch/powerpc/platforms/512x/
H A Dmpc512x_lpbfifo.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * The driver for Freescale MPC512x LocalPlus Bus FIFO
6 * Copyright (C) 2013-2015 Alexander Popov <alex.popov@linux.com>.
21 #include <linux/dma-direction.h>
22 #include <linux/dma-mapping.h>
61 * mpc512x_lpbfifo_irq - IRQ handler for LPB FIFO
76 if (!req || req->dir == MPC512X_LPBFIFO_REQ_DIR_READ) { in mpc512x_lpbfifo_irq()
81 status = in_be32(&lpbfifo.regs->status); in mpc512x_lpbfifo_irq()
84 out_be32(&lpbfifo.regs->enable, in mpc512x_lpbfifo_irq()
89 out_be32(&lpbfifo.regs->status, MPC512X_SCLPC_SUCCESS); in mpc512x_lpbfifo_irq()
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/linux/drivers/iio/imu/st_lsm6dsx/
H A Dst_lsm6dsx_buffer.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * STMicroelectronics st_lsm6dsx FIFO buffer library driver
5 * Pattern FIFO:
6 * The FIFO buffer can be configured to store data from gyroscope and
8 * specific pattern based on 'FIFO data sets' (6 bytes each):
9 * - 1st data set is reserved for gyroscope data
10 * - 2nd data set is reserved for accelerometer data
11 * The FIFO pattern changes depending on the ODRs and decimation factors
12 * assigned to the FIFO data sets. The first sequence of data stored in FIFO
13 * buffer contains the data of all the enabled FIFO data sets
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/linux/drivers/gpu/drm/mcde/
H A Dmcde_display.c1 // SPDX-License-Identifier: GPL-2.0
5 * (C) ST-Ericsson SA 2013
9 #include <linux/dma-buf.h>
11 #include <linux/media-bus-format.h>
31 /* TODO: implement FIFO C0 and FIFO C1 */
80 mispp = readl(mcde->regs + MCDE_MISPP); in mcde_display_irq()
81 misovl = readl(mcde->regs + MCDE_MISOVL); in mcde_display_irq()
82 mischnl = readl(mcde->regs + MCDE_MISCHNL); in mcde_display_irq()
92 if (!mcde->dpi_output && mcde_dsi_irq(mcde->mdsi)) { in mcde_display_irq()
101 if (mcde->flow_mode == MCDE_COMMAND_ONESHOT_FLOW) { in mcde_display_irq()
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/linux/drivers/net/usb/
H A Dsmsc95xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2007-2008 SMSC
38 /* SCSRs - System Control and Status Registers */
57 #define INT_STS_TDFU_ (0x00002000) /* TX Data FIFO Underrun */
58 #define INT_STS_TDFO_ (0x00001000) /* TX Data FIFO Overrun */
65 #define RX_FIFO_FLUSH_ (0x00000001) /* Receive FIFO Flush */
71 #define TX_CFG_FIFO_FLUSH_ (0x00000001) /* Transmit FIFO Flush */
88 /* Receive FIFO Information Register */
90 #define RX_FIFO_INF_USED_ (0x0000FFFF) /* RX Data FIFO Used Space */
92 /* Transmit FIFO Information Register */
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/linux/sound/soc/fsl/
H A Dfsl_dma.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
16 #include <linux/dma-mapping.h>
72 /** fsl_dma_private: p-substream DMA data
74 * Each substream has a 1-to-1 association with a DMA channel.
76 * The link[] array is first because it needs to be aligned on a 32-byte
120 * Since each link descriptor has a 32-bit byte count field, we set
121 * period_bytes_max to the largest 32-bit number. We also have no maximum
137 .period_bytes_max = (u32) -1,
139 .periods_max = (unsigned int) -1,
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H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
12 // sane processor vendors have a FIFO per AC97 slot, the i.MX has only
13 // one FIFO which combines all valid receive slots. We cannot even select
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
65 * order. The STX is a shift register, so all the bits need to be aligned
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/linux/drivers/net/ethernet/broadcom/
H A Db44.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 #define B44_BIST_STAT 0x000CUL /* Built-In Self-Test Status */
41 #define ISTAT_RFO 0x00004000 /* Receive FIFO Overflow */
42 #define ISTAT_TFU 0x00008000 /* Transmit FIFO Underflow */
65 #define MAC_FLOW_RX_HI_WATER 0x000000ff /* Receive FIFO HI Water Mark */
90 #define DMATX_STAT_EDFU 0x00020000 /* Error Data FIFO Underrun */
110 #define DMARX_STAT_EDFO 0x00020000 /* Error Data FIFO Overflow */
113 #define B44_DMAFIFO_AD 0x0220UL /* DMA FIFO Diag Address */
120 #define DMAFIFO_AD_SXFD 0x00080000 /* Select Transmit FIFO Data */
121 #define DMAFIFO_AD_SXFP 0x00090000 /* Select Transmit FIFO Pointers */
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H A Dtg3.c7 * Copyright (C) 2005-2016 Broadcom Corporation.
8 * Copyright (C) 2016-2017 Broadcom Limited.
14 * Copyright (C) 2000-2016 Broadcom Corporation.
15 * Copyright (C) 2016-2017 Broadcom Ltd.
52 #include <linux/dma-mapping.h>
56 #include <linux/hwmon-sysfs.h>
94 _tg3_flag(TG3_FLAG_##flag, (tp)->tg3_flags)
96 _tg3_flag_set(TG3_FLAG_##flag, (tp)->tg3_flags)
98 _tg3_flag_clear(TG3_FLAG_##flag, (tp)->tg3_flags)
124 * and dev->tx_timeout() should be called to fix the problem
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/linux/drivers/i2c/busses/
H A Di2c-fsi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * FSI-attached I2C controller algorithm
71 /* watermark register */
189 u32 mode = I2C_MODE_ENHANCED, extended_status, watermark; in fsi_i2c_dev_init() local
193 rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, &interrupt); in fsi_i2c_dev_init()
198 rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_MODE, &mode); in fsi_i2c_dev_init()
202 rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_ESTAT, &extended_status); in fsi_i2c_dev_init()
206 i2c->fifo_size = FIELD_GET(I2C_ESTAT_FIFO_SZ, extended_status); in fsi_i2c_dev_init()
207 watermark = FIELD_PREP(I2C_WATERMARK_HI, in fsi_i2c_dev_init()
208 i2c->fifo_size - I2C_FIFO_HI_LVL); in fsi_i2c_dev_init()
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/linux/drivers/mmc/host/
H A Ddw_mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/dma-mapping.h>
38 #include <linux/mmc/slot-gpio.h>
73 ((d)->des2 = ((d)->des2 & cpu_to_le32(0x03ffe000)) | \
78 u32 des4; /* Lower 32-bits of Buffer Address Pointer 1*/
79 u32 des5; /* Upper 32-bits of Buffer Address Pointer 1*/
81 u32 des6; /* Lower 32-bits of Next Descriptor Address */
82 u32 des7; /* Upper 32-bits of Next Descriptor Address */
97 ((d)->des1 = ((d)->des1 & cpu_to_le32(0x03ffe000)) | (cpu_to_le32((s) & 0x1fff)))
110 struct dw_mci_slot *slot = s->private; in dw_mci_req_show()
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/linux/drivers/tty/serial/
H A Dserial-tegra.c1 // SPDX-License-Identifier: GPL-2.0
5 * High-speed serial driver for NVIDIA Tegra SoCs
7 * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved.
16 #include <linux/dma-mapping.h>
56 * Tx fifo trigger level setting in tegra uart is in
79 * @tx_fifo_full_status: Status flag available for checking tx fifo full.
80 * @allow_txfifo_reset_fifo_mode: allow_tx fifo reset with fifo mode or not.
83 * @fifo_mode_enable_status: Is FIFO mode enabled?
159 return readl(tup->uport.membase + (reg << tup->uport.regshift)); in tegra_uart_read()
165 writel(val, tup->uport.membase + (reg << tup->uport.regshift)); in tegra_uart_write()
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/linux/include/linux/
H A Dmmzone.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/pageblock-flags.h>
20 #include <linux/page-flags-layout.h>
23 #include <linux/page-flags.h>
28 /* Free memory management - zoned buddy allocator. */
99 * __dump_folio() in mm/debug.c passes a folio pointer to on-stack struct folio,
103 (get_pfnblock_migratetype(&folio->page, pfn) == MIGRATE_CMA)
136 get_pageblock_migratetype(&folio->page)
220 NR_KERNEL_MISC_RECLAIMABLE, /* reclaimable non-slab kernel pages */
244 * Not rate-limited (NRL) candidate pages for those can be promoted
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H A Dmm_types.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 #include <linux/page-flags-layout.h>
52 * which is guaranteed to be aligned. If you use the same storage as
53 * page->mapping, you must restore it to NULL before freeing the page.
68 * double-word aligned. Because struct slab currently just reinterprets the
69 * bits of struct page, we align all struct pages to double-word boundaries,
70 * and ensure that 'freelist' is aligned within struct slab.
85 * avoid collision and false-positive PageTail().
91 * lruvec->lru_lock. Sometimes used as a generic list
108 * @private: Mapping-private opaque data.
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/linux/drivers/net/ethernet/marvell/
H A Dsky2.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * of the original driver such as link fail-over and link management because
19 #include <linux/dma-mapping.h>
54 #define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
70 #define RING_NEXT(x, s) (((x)+1) & ((s)-1))
77 static int debug = -1; /* defaults above */
85 static int disable_msi = -1;
94 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
95 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
96 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
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/linux/drivers/spi/
H A Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include <linux/dma-mapping.h>
30 #include <linux/dma/imx-dma.h>
54 #define MXC_INT_TE (1 << 1) /* Transmit FIFO empty interrupt */
118 unsigned int txfifo; /* number of words pushed in tx FIFO */
138 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
143 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
148 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
153 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
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/linux/drivers/gpu/drm/radeon/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
815 // Following function ENABLE sub-function will be used by driver when TMDS/HDMI/LVDS is used, disab…
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/linux/drivers/gpu/drm/amd/include/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
538 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
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/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
23 #include <linux/dma-mapping.h>
37 #include <linux/firmware/xlnx-zynqmp.h>
61 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
72 …MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN -…
88 * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions)
127 switch (bp->hw_dma_cap) { in macb_dma_desc_get_size()
152 switch (bp->hw_dma_cap) { in macb_adj_dma_desc_idx()
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/linux/drivers/net/wireless/ath/wcn36xx/
H A Dhal.h20 /*---------------------------------------------------------------------------
32 All values are in the range 0..255 (ie they are 8-bit values)
33 ---------------------------------------------------------------------------*/
91 /* How many frames until we start a-mpdu TX session */
99 /* Init/De-Init */
438 /* 20/40MHZ offset-HIGH 40/80MHZ offset HIGH */
493 /* Added for BT-AMP support */
496 /* Added for BT-AMP support */
574 /* BT-AMP Case */
600 /* BT-AMP events type */
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