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/linux/Documentation/devicetree/bindings/nvmem/
H A Dst,stm32-romem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Factory-programmed data
10 This represents STM32 Factory-programmed read only non-volatile area: locked
11 flash, OTP, read-only HW regs... This contains various information such as:
16 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
19 - $ref: nvmem.yaml#
20 - $ref: nvmem-deprecated-cells.yaml#
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H A Dapple,efuses.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC eFuse-based NVMEM
10 Apple SoCs such as the M1 contain factory-programmed eFuses used to e.g. store
11 calibration data for the PCIe and the Type-C PHY or unique chip identifiers
15 - Sven Peter <sven@svenpeter.dev>
18 - $ref: nvmem.yaml#
19 - $ref: nvmem-deprecated-cells.yaml#
24 - enum:
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/linux/Documentation/misc-devices/
H A Dad525x_dpot.rst1 .. SPDX-License-Identifier: GPL-2.0
9 settings. Access to the factory programmed tolerance is also provided, but
23 The tolerance files are the read-only factory programmed tolerance settings
24 and may vary greatly on a part-by-part basis. For exact interpretation of
35 0-0022 0-0027 0-002f
40 # ls /sys/bus/i2c/devices/0-002f/
45 # cd /sys/bus/i2c/devices/0-002f/
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-tegra-fuse1 What: /sys/devices/*/<our-device>/fuse
4 Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
6 data programmed at the factory. The data is laid out in 32bit
/linux/Documentation/devicetree/bindings/reset/
H A Dti,tps380x-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/ti,tps380x-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marco Felsch <kernel@pengutronix.de>
16 reset input (MR). The RESET output remains asserted for the factory
17 programmed delay after the voltage return above its threshold or after the
25 - ti,tps3801
27 reset-gpios:
31 "#reset-cells":
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/linux/Documentation/devicetree/bindings/power/reset/
H A Dtoradex,smarc-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/toradex,smarc-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
11 - Francesco Dolcini <francesco.dolcini@toradex.com>
18 - Reads the SMARC POWER_BTN# and RESET_IN# signals and controls the PMIC accordingly.
19 - Controls the SoC boot mode signals based on the SMARC BOOT_SEL# and FORCE_RECOV# inputs.
20 - Manages the CARRIER_STDBY# signal in response to relevant SoC signals.
22 …The EC runs a small firmware, factory programmed into its internal flash, and communicates over I2…
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/linux/drivers/mtd/chips/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
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/linux/drivers/hwmon/
H A Dnsa320-hwmon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/hwmon/nsa320-hwmon.c
8 * Copyright (C) 2016 Adam Baker <linux@baker-net.org.uk>
18 #include <linux/hwmon-sysfs.h>
29 * The Zyxel hwmon MCU is a Holtek HT46R065 that is factory programmed
72 mutex_lock(&hwmon->update_lock); in nsa320_hwmon_update()
74 mcu_data = hwmon->mcu_data; in nsa320_hwmon_update()
76 if (time_after(jiffies, hwmon->last_updated + HZ) || mcu_data == 0) { in nsa320_hwmon_update()
77 gpiod_set_value(hwmon->act, 1); in nsa320_hwmon_update()
82 gpiod_set_value(hwmon->clk, 0); in nsa320_hwmon_update()
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/linux/Documentation/networking/device_drivers/can/
H A Dcan327.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
7 --------
14 -----------
26 -------------
33 order to fake full-duplex operation.
36 enough to implement simple request-response protocols (such as OBD II),
50 -----------
59 ----------------------------------
61 Every ELM327 chip is factory programmed to operate at a serial setting
68 --debug \
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/linux/drivers/mtd/devices/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
12 These devices come in memory configurations from 32M - 1G. If you
41 tristate "DEC MS02-NV NVRAM module support"
44 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
45 backed-up NVRAM module. The module was originally meant as an NFS
52 The module will be called ms02-nv.
59 Sometimes DataFlash chips are packaged inside MMC-format
77 one-time-programmable (OTP) data. The first half may be written
79 other key product data. The second half is programmed with a
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/linux/drivers/nvmem/
H A Dstm32-romem.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
18 #include "stm32-bsec-optee-ta.h"
20 /* BSEC secure service access from non-secure */
51 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
63 return -EIO; in stm32_bsec_smc()
70 return -ENXIO; in stm32_bsec_smc()
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mn-overdrive.dtsi"
16 compatible = "mmc-pwrseq-simple";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
19 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
21 clock-names = "ext_clock";
22 post-power-on-delay-ms = <80>;
32 cpu-supply = <&buck2_reg>;
36 cpu-supply = <&buck2_reg>;
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H A Dimx8mp-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
18 reg_wl_bt: regulator-wifi-bt {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
22 regulator-name = "wl-bt-pow-dwn";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
26 startup-delay-us = <70000>;
27 regulator-always-on;
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H A Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mm-overdrive.dtsi"
15 compatible = "mmc-pwrseq-simple";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
18 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
20 clock-names = "ext_clock";
21 post-power-on-delay-ms = <80>;
31 cpu-supply = <&buck2_reg>;
35 cpu-supply = <&buck2_reg>;
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/linux/drivers/mtd/maps/
H A Dichxrom.c1 // SPDX-License-Identifier: GPL-2.0-only
64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); in ichxrom_cleanup()
66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); in ichxrom_cleanup()
67 pci_dev_put(window->pdev); in ichxrom_cleanup()
70 list_for_each_entry_safe(map, scratch, &window->maps, list) { in ichxrom_cleanup()
71 if (map->rsrc.parent) in ichxrom_cleanup()
72 release_resource(&map->rsrc); in ichxrom_cleanup()
73 mtd_device_unregister(map->mtd); in ichxrom_cleanup()
74 map_destroy(map->mtd); in ichxrom_cleanup()
75 list_del(&map->list); in ichxrom_cleanup()
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H A Desb2rom.c1 // SPDX-License-Identifier: GPL-2.0-only
38 /* This became a 16-bit register, and EN2 has disappeared */
56 /* these are 32-bit values */
124 pci_read_config_byte(window->pdev, BIOS_CNTL, &byte); in esb2rom_cleanup()
125 pci_write_config_byte(window->pdev, BIOS_CNTL, in esb2rom_cleanup()
129 list_for_each_entry_safe(map, scratch, &window->maps, list) { in esb2rom_cleanup()
130 if (map->rsrc.parent) in esb2rom_cleanup()
131 release_resource(&map->rsrc); in esb2rom_cleanup()
132 mtd_device_unregister(map->mtd); in esb2rom_cleanup()
133 map_destroy(map->mtd); in esb2rom_cleanup()
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/linux/arch/mips/boot/dts/ingenic/
H A Dci20.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
22 stdout-path = &uart4;
31 gpio-keys {
32 compatible = "gpio-keys";
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/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_factory.c50 dc_ctx->logger
57 /* link factory owns the creation/destruction of link structures. */
61 link_srv->create_link = link_create; in construct_link_service_factory()
62 link_srv->destroy_link = link_destroy; in construct_link_service_factory()
72 link_srv->detect_link = link_detect; in construct_link_service_detection()
73 link_srv->detect_connection_type = link_detect_connection_type; in construct_link_service_detection()
74 link_srv->add_remote_sink = link_add_remote_sink; in construct_link_service_detection()
75 link_srv->remove_remote_sink = link_remove_remote_sink; in construct_link_service_detection()
76 link_srv->get_hpd_state = link_get_hpd_state; in construct_link_service_detection()
77 link_srv->enable_hpd = link_enable_hpd; in construct_link_service_detection()
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/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dsi.c91 struct intel_display *display = to_intel_display(&intel_dsi->base); in vlv_dsi_wait_for_fifo_empty()
99 drm_err(display->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
111 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
127 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
136 struct intel_dsi *intel_dsi = intel_dsi_host->intel_dsi; in intel_dsi_host_transfer()
137 struct intel_display *display = to_intel_display(&intel_dsi->base); in intel_dsi_host_transfer()
138 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer()
151 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
167 drm_err(display->drm, in intel_dsi_host_transfer()
174 if (msg->rx_len) { in intel_dsi_host_transfer()
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/linux/drivers/power/supply/
H A Dqcom_smbx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
7 * This driver is for the switch-mode battery charger and boost
12 #include <linux/devm-helpers.h>
26 /* clang-format off */
352 /* clang-format on */
372 * struct smb_chip - smb chip structure
419 rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS, &stat); in smb_get_prop_usb_online()
421 dev_err(chip->dev, "Couldn't read power path status: %d\n", rc); in smb_get_prop_usb_online()
446 rc = regmap_read(chip->regmap, chip->base + APSD_STATUS, &apsd_stat); in smb_apsd_get_charger_type()
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/linux/drivers/rtc/
H A Drtc-ds1307.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
23 #include <linux/hwmon-sysfs.h>
24 #include <linux/clk-provider.h>
29 * We can't determine type by probing, but if we expect pre-Linux code
31 * setting the date and time), Linux can ignore the non-clock features.
32 * That's a natural job for a factory or repair bench.
56 #define DS1307_REG_SECS 0x00 /* 00-59 */
60 #define DS1307_REG_MIN 0x01 /* 00-59 */
62 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
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/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_hw.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * t4_wait_op_done_val - wait until an operation is completed
46 * @mask: a single-bit field within @reg that indicates completion
55 * operation completes and -EAGAIN otherwise.
68 if (--attempts == 0) in t4_wait_op_done_val()
69 return -EAGAIN; in t4_wait_op_done_val()
83 * t4_set_reg_field - set a register field to a value
102 * t4_read_indirect - read indirectly addressed registers
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/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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