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Searched +full:exynos5250 +full:- +full:trng (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/rng/
H A Dsamsung,exynos5250-trng.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rng/samsung,exynos5250-trng.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Łukasz Stelmach <l.stelmach@samsung.com>
16 - samsung,exynos5250-trng
17 - samsung,exynos850-trng
23 clock-names:
31 - compatible
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <1>;
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
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H A Dexynos5410.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-a15";
37 clock-frequency = <1600000000>;
42 compatible = "arm,cortex-a15";
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H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5250 SoC device tree source
8 * Samsung Exynos5250 SoC device nodes are listed in this file.
9 * Exynos5250 based board files can include this file and provide
13 * Exynos5250 SoC. As device tree coverage for Exynos5250 increases,
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
23 compatible = "samsung,exynos5250", "samsung,exynos5";
46 #address-cells = <1>;
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H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
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/linux/Documentation/devicetree/bindings/crypto/
H A Dsamsung-sss.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/crypto/samsung-sss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 -- Feeder (FeedCtrl)
15 -- Advanced Encryption Standard (AES)
16 -- Data Encryption Standard (DES)/3DES
17 -- Public Key Accelerator (PKA)
18 -- SHA-1/SHA-256/MD5/HMAC (SHA-1/SHA-256/MD5)/PRNG
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/linux/drivers/char/hw_random/
H A Dexynos-trng.c1 // SPDX-License-Identifier: GPL-2.0
9 * Based on the Exynos PRNG driver drivers/crypto/exynos-rng by
13 #include <linux/arm-smccc.h>
85 struct exynos_trng_dev *trng = (struct exynos_trng_dev *)rng->priv; in exynos_trng_do_read_reg() local
89 writel_relaxed(max * 8, trng->mem + EXYNOS_TRNG_FIFO_CTRL); in exynos_trng_do_read_reg()
90 val = readl_poll_timeout(trng->mem + EXYNOS_TRNG_FIFO_CTRL, val, in exynos_trng_do_read_reg()
95 memcpy_fromio(data, trng->mem + EXYNOS_TRNG_FIFO_0, max); in exynos_trng_do_read_reg()
126 return -EIO; in exynos_trng_do_read_smc()
135 struct exynos_trng_dev *trng = (struct exynos_trng_dev *)rng->priv; in exynos_trng_init_reg() local
139 sss_rate = clk_get_rate(trng->clk); in exynos_trng_init_reg()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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