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/linux/tools/testing/selftests/powerpc/tm/
H A Dtm-trap.c5 * Check if thread endianness is flipped inadvertently to BE on trap
10 * and load_vec and then causing a trap in TM. Since the endianness
21 * to zero which determines a BE endianness that is the native
22 * endianness on BE machines, so nothing notably critical happens,
25 * it on BE machines LE endianness is forced after a first trap and then
26 * the endianness is verified on subsequent traps to determine if the
27 * endianness "flipped back" to the native endianness (BE).
66 /* Get thread endianness: extract bit LE from MSR */ in trap_signal_handler()
77 * event that endianness is flipped by the bug, so just in trap_signal_handler()
79 * check on the second trap event if endianness is in trap_signal_handler()
[all …]
/linux/Documentation/devicetree/bindings/
H A Dcommon-properties.txt4 Endianness
8 byte swapping, but endianness issues show up frequently in porting drivers to
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
23 register endianness based on the CPU's configured endianness.
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dbtf_endian.c25 /* Load BTF in native endianness */ in test_btf_endian()
34 /* Get raw BTF data in non-native endianness... */ in test_btf_endian()
51 /* both raw data should be identical (with non-native endianness) */ in test_btf_endian()
59 /* swap it back to native endianness */ in test_btf_endian()
90 /* the type should appear as if it was stored in native endianness */ in test_btf_endian()
/linux/Documentation/devicetree/bindings/mips/lantiq/
H A Dfpi-bus.txt13 - lantiq,offset-endianness : Offset of the endianness configuration
24 lantiq,offset-endianness = <0x4c>;
/linux/include/misc/
H A Docxl.h54 OCXL_HOST_ENDIAN = 2, /**< AFU data is the same endianness as the host */
235 * @endian: the endianness that the MMIO data is in
247 * @endian: the endianness that the MMIO data is in
259 * @endian: the endianness that the MMIO data is in
271 * @endian: the endianness that the MMIO data is in
283 * @endian: the endianness that the MMIO data is in
295 * @endian: the endianness that the MMIO data is in
307 * @endian: the endianness that the MMIO data is in
319 * @endian: the endianness that the MMIO data is in
/linux/tools/objtool/include/objtool/
H A Dendianness.h9 * Does a byte swap if target file endianness doesn't match the host, i.e. cross
12 * to be written to a target native endianness ELF file.
/linux/drivers/input/joystick/
H A Dadc-joystick.c57 enum iio_endian endianness; in adc_joystick_handle() local
66 endianness = joy->chans[i].channel->scan_type.endianness; in adc_joystick_handle()
81 if (endianness == IIO_BE) in adc_joystick_handle()
83 else if (endianness == IIO_LE) in adc_joystick_handle()
/linux/drivers/soc/lantiq/
H A Dfpi-bus.c45 ret = device_property_read_u32(dev, "lantiq,offset-endianness", in ltq_fpi_probe()
56 "Failed to configure RCU AHB endianness\n"); in ltq_fpi_probe()
/linux/tools/testing/selftests/rseq/
H A Drseq-arm.h29 * ARMv6+ -mbig-endian generates mixed endianness code vs data: little-endian
47 * (which match), so the endianness of the data representation of the
50 * data endianness will be mixed before the linker is invoked. So rather
/linux/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.h54 * MIPS endianness is configured by boot strap, which also reverses all in brcmnand_readl()
55 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcmnand_readl()
/linux/drivers/iio/adc/
H A Dad7380.c155 .endianness = IIO_CPU,
161 .endianness = IIO_CPU,
171 .endianness = IIO_CPU,
177 .endianness = IIO_CPU,
187 .endianness = IIO_CPU,
193 .endianness = IIO_CPU,
203 .endianness = IIO_CPU,
209 .endianness = IIO_CPU,
219 .endianness = IIO_CPU,
225 .endianness = IIO_CPU,
[all …]
/linux/drivers/gpu/drm/vkms/
H A Dvkms_drv.h55 * machine endianness
57 * machine endianness
59 * machine endianness
61 * machine endianness
/linux/arch/arm64/kernel/
H A Dsmp_spin_table.c87 * endianness of the kernel. Therefore, any boot-loaders that in smp_spin_table_cpu_prepare()
89 * boot-loader's endianness before jumping. This is mandated by in smp_spin_table_cpu_prepare()
H A Dacpi_parking_protocol.c98 * native endianness of the kernel. Therefore, any boot-loaders in acpi_parking_protocol_cpu_boot()
100 * Boot-Loader's endianness before jumping. in acpi_parking_protocol_cpu_boot()
/linux/Documentation/filesystems/
H A Dqnx6.rst22 This feature makes it possible to create and use a different endianness fs
24 running on a different endianness.
26 The Linux driver handles endianness transparently. (LE and BE)
/linux/scripts/mod/
H A Dempty.c1 /* empty file to figure out endianness / word size */
/linux/kernel/gcov/
H A Dbase.c59 * unsigned binary form of the endianness of the machine generating the
82 * unsigned binary form of the endianness of the machine generating the
/linux/arch/microblaze/
H A DKconfig49 # Endianness selection
51 prompt "Endianness selection"
/linux/Documentation/ABI/testing/
H A Dsysfs-kernel-cpu_byteorder6 The endianness of the running kernel.
/linux/drivers/iio/pressure/
H A Dst_pressure_core.c133 .endianness = IIO_LE,
147 .endianness = IIO_LE,
167 .endianness = IIO_LE,
181 .endianness = IIO_LE,
199 .endianness = IIO_LE,
214 .endianness = IIO_LE,
/linux/arch/mips/include/asm/sgi/
H A Dmc.h41 #define SGIMC_CCTRL1_FIXEDEHPC 0x00001000 /* Fixed HPC endianness */
43 #define SGIMC_CCTRL1_FIXEDEEXP0 0x00004000 /* Fixed EXP0 endianness */
45 #define SGIMC_CCTRL1_FIXEDEEXP1 0x00010000 /* Fixed EXP1 endianness */
/linux/drivers/phy/broadcom/
H A Dphy-brcm-usb-init.h84 * MIPS endianness is configured by boot strap, which also reverses all in brcm_usb_readl()
85 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcm_usb_readl()
/linux/samples/bpf/
H A Dnet_shared.h31 # error "Endianness detection needs to be set up for your compiler?!"
/linux/Documentation/devicetree/bindings/regmap/
H A Dregmap.txt17 modes, with a single hardware switch controlling both the endianness
/linux/drivers/ata/
H A Dahci_brcm.c96 * MIPS endianness is configured by boot strap, which also reverses all in brcm_sata_readreg()
97 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcm_sata_readreg()
238 /* Configure endianness */ in brcm_sata_init()
504 /* Must be first so as to configure endianness including that in brcm_ahci_probe()

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