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/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dvsc8211.c2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
53 VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
60 VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
133 unsigned int bmcr, status, lpa, adv; in vsc8211_get_link_status() local
134 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status()
144 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status()
179 &lpa); in vsc8211_get_link_status()
186 if (lpa & adv & ADVERTISE_PAUSE_CAP) in vsc8211_get_link_status()
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,rpmsg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
18 Cortex-A and Cortex-M.
21 - $ref: sound-card-common.yaml#
26 - fsl,imx7ulp-rpmsg-audio
27 - fsl,imx8mn-rpmsg-audio
28 - fsl,imx8mm-rpmsg-audio
29 - fsl,imx8mp-rpmsg-audio
[all …]
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_pcs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
20 /* ADV, LPA and EXP are only available for the TBI and RTBI interfaces */
27 #define GMAC_AN_CTRL_RAN BIT(9) /* Restart Auto-Negotiation */
28 #define GMAC_AN_CTRL_ANE BIT(12) /* Auto-Negotiation Enable */
29 #define GMAC_AN_CTRL_ELE BIT(14) /* External Loopback Enable */
30 #define GMAC_AN_CTRL_ECD BIT(16) /* Enable Comma Detect */
36 #define GMAC_AN_STATUS_ANA BIT(3) /* Auto-Negotiation Ability */
37 #define GMAC_AN_STATUS_ANC BIT(5) /* Auto-Negotiation Complete */
40 /* ADV and LPA defines */
50 * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
[all …]
/linux/drivers/net/dsa/mv88e6xxx/
H A Dpcs-6352.c1 // SPDX-License-Identifier: GPL-2.0-or-later
43 mutex_lock(&mpcs->mdio.bus->mdio_lock); in marvell_c22_pcs_set_fiber_page()
45 err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE); in marvell_c22_pcs_set_fiber_page()
47 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
49 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
55 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_set_fiber_page()
58 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
60 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
73 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_restore_page()
76 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_restore_page()
[all …]
H A Dpcs-639x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
36 err = mdiodev_c45_read(&mpcs->mdio, MDIO_MMD_PHYXS, regnum); in mv88e639x_read()
47 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, val); in mv88e639x_write()
53 return mdiodev_c45_modify(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, mask, in mv88e639x_modify()
60 return mdiodev_c45_modify_changed(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, in mv88e639x_modify_changed()
74 mpcs->mdio.dev.parent = dev; in mv88e639x_pcs_alloc()
75 mpcs->mdio.bus = bus; in mv88e639x_pcs_alloc()
76 mpcs->mdio.addr = addr; in mv88e639x_pcs_alloc()
78 snprintf(mpcs->name, sizeof(mpcs->name), in mv88e639x_pcs_alloc()
79 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port); in mv88e639x_pcs_alloc()
[all …]
/linux/drivers/net/pcs/
H A Dpcs-xpcs.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/pcs/pcs-xpcs.h>
17 #include "pcs-xpcs.h"
128 for (compat = xpcs->desc->compat; compat->supported; compat++) in xpcs_find_compat()
129 if (compat->interface == interface) in xpcs_find_compat()
137 return &xpcs->pcs; in xpcs_to_phylink_pcs()
147 return -ENODEV; in xpcs_get_an_mode()
149 return compat->an_mode; in xpcs_get_an_mode()
158 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
159 if (compat->supported[i] == linkmode) in __xpcs_linkmode_supported()
[all …]
/linux/drivers/net/ethernet/dec/tulip/
H A Dmedia.c5 Written/copyright 1994-2001 by Donald Becker.
21 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
25 /* Read and write the MII registers using software-generated serial
41 Read and write the MII registers using software-generated serial
43 See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
53 void __iomem *ioaddr = tp->base_addr; in tulip_mdio_read()
60 if (tp->chip_id == COMET && phy_id == 30) { in tulip_mdio_read()
66 spin_lock_irqsave(&tp->mii_lock, flags); in tulip_mdio_read()
67 if (tp->chip_id == LC82C168) { in tulip_mdio_read()
71 for (i = 1000; i >= 0; --i) { in tulip_mdio_read()
[all …]
/linux/drivers/net/phy/
H A Dphy-c45.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "mdio-open-alliance.h"
12 #include "phylib-internal.h"
15 * genphy_c45_baset1_able - checks if the PMA has BASE-T1 extended abilities
22 if (phydev->pma_extable == -ENODATA) { in genphy_c45_baset1_able()
27 phydev->pma_extable = val; in genphy_c45_baset1_able()
30 return !!(phydev->pma_extable & MDIO_PMA_EXTABLE_BT1); in genphy_c45_baset1_able()
34 * genphy_c45_pma_can_sleep - checks if the PMA have sleep support
49 * genphy_c45_pma_resume - wakes up the PMA module
55 return -EOPNOTSUPP; in genphy_c45_pma_resume()
[all …]
H A Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
23 #include "phy-caps.h"
38 * struct phylink - internal data type for phylink
55 u8 link_port; /* The current non-phy ethtool port */
70 /* Serialize updates to pl->phydev with phylink_resolve() */
100 if ((pl)->config->type == PHYLINK_NETDEV) \
101 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
102 else if ((pl)->config->type == PHYLINK_DEV) \
103 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
[all …]
H A Dphy_device.c1 // SPDX-License-Identifier: GPL-2.0+
33 #include <linux/pse-pd/pse.h>
44 #include "phylib-internal.h"
45 #include "phy-caps.h"
214 put_device(&phydev->mdio.dev); in phy_device_free()
228 fwnode_handle_put(dev->fwnode); in phy_device_release()
256 struct net_device *netdev = phydev->attached_dev; in phy_link_change()
262 phydev->adjust_link(netdev); in phy_link_change()
263 if (phydev->mii_ts && phydev->mii_ts->link_state) in phy_link_change()
264 phydev->mii_ts->link_state(phydev->mii_ts, phydev); in phy_link_change()
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dtenxpress.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2007-2011 Solarflare Communications Inc.
150 /* Enable 312.5 MHz clock */ in tenxpress_init()
170 return -ENOMEM; in tenxpress_phy_probe()
171 efx->phy_data = phy_data; in tenxpress_phy_probe()
172 phy_data->phy_mode = efx->phy_mode; in tenxpress_phy_probe()
174 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS; in tenxpress_phy_probe()
175 efx->mdio.mode_support = MDIO_SUPPORTS_C45; in tenxpress_phy_probe()
177 efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS; in tenxpress_phy_probe()
179 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg | in tenxpress_phy_probe()
[all …]
/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_port_common.c1 // SPDX-License-Identifier: GPL-2.0-only
23 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name)); in efx_mcdi_get_phy_cfg()
31 rc = -EIO; in efx_mcdi_get_phy_cfg()
35 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS); in efx_mcdi_get_phy_cfg()
36 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE); in efx_mcdi_get_phy_cfg()
37 cfg->supported_cap = in efx_mcdi_get_phy_cfg()
39 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL); in efx_mcdi_get_phy_cfg()
40 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT); in efx_mcdi_get_phy_cfg()
41 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK); in efx_mcdi_get_phy_cfg()
42 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME), in efx_mcdi_get_phy_cfg()
[all …]
/linux/drivers/net/ethernet/sfc/
H A Dmcdi_port_common.c1 // SPDX-License-Identifier: GPL-2.0-only
22 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name)); in efx_mcdi_get_phy_cfg()
30 rc = -EIO; in efx_mcdi_get_phy_cfg()
34 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS); in efx_mcdi_get_phy_cfg()
35 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE); in efx_mcdi_get_phy_cfg()
36 cfg->supported_cap = in efx_mcdi_get_phy_cfg()
38 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL); in efx_mcdi_get_phy_cfg()
39 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT); in efx_mcdi_get_phy_cfg()
40 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK); in efx_mcdi_get_phy_cfg()
41 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME), in efx_mcdi_get_phy_cfg()
[all …]
/linux/drivers/net/
H A Dsungem_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * (c) 2002-2007, Benjamin Herrenscmidt (benh@kernel.crashing.org)
10 * - Add support for PHYs that provide an IRQ line
11 * - Eventually moved the entire polling state machine in
14 * - On LXT971 & BCM5201, Apple uses some chip specific regs
17 * - Apple has some additional power management code for some
49 return phy->mdio_read(phy->dev, id, reg); in __sungem_phy_read()
54 phy->mdio_write(phy->dev, id, reg, val); in __sungem_phy_write()
59 return phy->mdio_read(phy->dev, phy->mii_id, reg); in sungem_phy_read()
64 phy->mdio_write(phy->dev, phy->mii_id, reg, val); in sungem_phy_write()
[all …]
/linux/arch/parisc/include/asm/
H A Dspecial_insns.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #define lpa(va) ({ \ macro
36 * prober_user() - Probe user read access
40 * Return: Non-zero if address is accessible.
63 #define CR_EIEM 15 /* External Interrupt Enable Mask */
/linux/drivers/net/usb/
H A Drtl8150.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #define DRIVER_DESC "rtl8150 based usb-ethernet driver"
163 return usb_control_msg_recv(dev->udev, 0, RTL8150_REQ_GET_REGS, in get_registers()
170 return usb_control_msg_send(dev->udev, 0, RTL8150_REQ_SET_REGS, in set_registers()
177 struct async_req *req = (struct async_req *)urb->context; in async_set_reg_cb()
178 int status = urb->status; in async_set_reg_cb()
181 dev_dbg(&urb->dev->dev, "%s failed with %d", __func__, status); in async_set_reg_cb()
188 int res = -ENOMEM; in async_set_registers()
200 req->rx_creg = cpu_to_le16(reg); in async_set_registers()
201 req->dr.bRequestType = RTL8150_REQT_WRITE; in async_set_registers()
[all …]
/linux/drivers/net/ethernet/broadcom/
H A Dbcm63xx_enet.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/dma-mapping.h>
38 return bcm_readl(priv->base + off); in enet_readl()
44 bcm_writel(val, priv->base + off); in enet_writel()
52 return bcm_readl(priv->base + off); in enetsw_readl()
58 bcm_writel(val, priv->base + off); in enetsw_writel()
63 return bcm_readw(priv->base + off); in enetsw_readw()
69 bcm_writew(val, priv->base + off); in enetsw_writew()
74 return bcm_readb(priv->base + off); in enetsw_readb()
80 bcm_writeb(val, priv->base + off); in enetsw_writeb()
[all …]
/linux/drivers/net/ethernet/marvell/
H A Dskge.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * of the original driver such as link fail-over and link management because
28 #include <linux/dma-mapping.h>
60 MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
68 static int debug = -1; /* defaults above */
76 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x4300) }, /* SK-9xx */
78 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x4320) }, /* SK-98xx V2.0 */
79 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b01) }, /* D-Link DGE-530T (rev.B) */
80 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4c00) }, /* D-Link DGE-530T */
81 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4302) }, /* D-Link DGE-530T Rev C1 */
[all …]
H A Dsky2.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * of the original driver such as link fail-over and link management because
19 #include <linux/dma-mapping.h>
54 #define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
70 #define RING_NEXT(x, s) (((x)+1) & ((s)-1))
77 static int debug = -1; /* defaults above */
85 static int disable_msi = -1;
94 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
95 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
96 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
[all …]
/linux/sound/soc/fsl/
H A Dfsl_rpmsg.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2018-2021 NXP
5 #include <linux/clk-provider.h>
18 #include "imx-pcm.h"
46 struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL; in fsl_rpmsg_hw_params()
51 while (p && rpmsg->pll8k && rpmsg->pll11k) { in fsl_rpmsg_hw_params()
54 if (clk_is_match(pp, rpmsg->pll8k) || in fsl_rpmsg_hw_params()
55 clk_is_match(pp, rpmsg->pll11k)) { in fsl_rpmsg_hw_params()
64 npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k); in fsl_rpmsg_hw_params()
68 dev_warn(dai->dev, "failed to set parent %s: %d\n", in fsl_rpmsg_hw_params()
[all …]
H A Dimx-pcm-rpmsg.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2017-2021 NXP
4 #include <linux/dma-mapping.h>
15 #include "imx-pcm.h"
17 #include "imx-pcm-rpmsg.h"
39 struct rpmsg_device *rpdev = info->rpdev; in imx_rpmsg_pcm_send_message()
42 mutex_lock(&info->msg_lock); in imx_rpmsg_pcm_send_message()
44 dev_err(info->dev, "rpmsg channel not ready\n"); in imx_rpmsg_pcm_send_message()
45 mutex_unlock(&info->msg_lock); in imx_rpmsg_pcm_send_message()
46 return -EINVAL; in imx_rpmsg_pcm_send_message()
[all …]
/linux/drivers/soc/samsung/
H A Dexynos5250-pmu.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
6 // Exynos5250 - CPU PMU (Power Management Unit) support
9 #include <linux/soc/samsung/exynos-regs-pmu.h>
10 #include <linux/soc/samsung/exynos-pmu.h>
12 #include "exynos-pmu.h"
15 /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
161 * Enable both SC_FEEDBACK and SC_COUNTER in exynos5_powerdown_conf()
171 * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable in exynos5_powerdown_conf()
H A Dexynos5420-pmu.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
6 // Exynos5420 - CPU PMU (Power Management Unit) support
10 #include <linux/soc/samsung/exynos-regs-pmu.h>
11 #include <linux/soc/samsung/exynos-pmu.h>
15 #include "exynos-pmu.h"
18 /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
220 * for local power blocks to Low initially as per Table 8-4: in exynos5420_pmu_init()
221 * "System-Level Power-Down Configuration Registers". in exynos5420_pmu_init()
226 /* Enable USE_STANDBY_WFI for all CORE */ in exynos5420_pmu_init()
/linux/include/linux/
H A Dphylink.h24 MLO_AN_FIXED, /* Fixed-link mode */
25 MLO_AN_INBAND, /* In-band protocol */
28 * PHYLINK_PCS_NEG_NONE - protocol has no inband capability
29 * PHYLINK_PCS_NEG_OUTBAND - some out of band or fixed link setting
30 * PHYLINK_PCS_NEG_INBAND_DISABLED - inband mode disabled, e.g.
31 * 1000base-X with autoneg off
32 * PHYLINK_PCS_NEG_INBAND_ENABLED - inband mode enabled
34 * PHYLINK_PCS_NEG_INBAND - inband mode selected
35 * PHYLINK_PCS_NEG_ENABLED - negotiation mode enabled
104 * struct phylink_link_state - lin
[all...]
/linux/drivers/net/ethernet/davicom/
H A Ddm9000.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
39 /* Board/System/Debug information/definition ---------------- */
57 MODULE_PARM_DESC(debug, "dm9000 debug level (0-6)");
87 /* Structure/enum declaration ------------------------------- */
143 dev_dbg(db->dev, msg); \
152 /* DM9000 network board routine ---------------------------- */
160 writeb(reg, db->io_addr); in ior()
161 return readb(db->io_data); in ior()
171 writeb(reg, db->io_addr); in iow()
[all …]

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