| /freebsd/sys/contrib/device-tree/src/riscv/starfive/ |
| H A D | jh7100-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h> 21 stdout-path = "serial0:115200n8"; 25 timebase-frequency = <6250000>; 34 compatible = "gpio-leds"; 36 led-ack { 40 linux,default-trigger = "heartbeat"; [all …]
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| H A D | jh7110-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 9 #include "jh7110-pinfunc.h" 10 #include <dt-bindings/gpio/gpio.h> 25 stdout-path = "serial0:115200n8"; 33 gpio-restart { 34 compatible = "gpio-restart"; 39 pwmdac_codec: audio-codec { 40 compatible = "linux,spdif-dit"; 41 #sound-dai-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | max8973-regulator.txt | 5 - compatible: must be one of following: 8 - reg: the i2c slave address of the regulator. It should be 0x1b. 15 -maxim,externally-enable: boolean, externally control the regulator output 16 enable/disable. 17 -maxim,enable-gpio: GPIO for enable control. If the valid GPIO is provided 18 then externally enable control will be considered. 19 -maxim,dvs-gpio: GPIO which is connected to DVS pin of device. 20 -maxim,dvs-default-state: Default state of GPIO during initialisation. 22 -maxim,enable-remote-sense: boolean, enable reote sense. 23 -maxim,enable-falling-slew-rate: boolean, enable falling slew rate. [all …]
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| H A D | maxim,max8973.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 - $ref: regulator.yaml# 18 - maxim,max8973 19 - maxim,max77621 21 junction-warn-millicelsius: 30 maxim,dvs-gpio: 35 maxim,dvs-default-state: [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | nvidia,tegra20-pinmux.txt | 4 - compatible: "nvidia,tegra20-pinmux" 5 - reg: Should contain the register physical address and length for each of 6 the tri-state, mux, pull-up/down, and pad control register sets. 8 Please refer to pinctrl-bindings.txt in this directory for details of the 16 parameters, such as pull-up, tristate, drive strength, etc. 30 Required subnode-properties: 31 - nvidia,pins : An array of strings. Each string contains the name of a pin or 34 Optional subnode-properties: 35 - nvidia,function: A string containing the name of the function to mux to the 38 - nvidia,pull: Integer, representing the pull-down/up to apply to the pin. [all …]
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| H A D | nvidia,tegra-pinmux-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 14 Please refer to pinctrl-bindings.txt in this directory for details of the 22 pin configuration parameters, such as pull-up, tristate, drive strength, 46 $ref: /schemas/types.yaml#/definitions/string-array 57 description: Pull-down/up setting to apply to the pin. [all …]
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| H A D | nvidia,tegra210-pinmux.txt | 4 - compatible: "nvidia,tegra210-pinmux" 5 - reg: Should contain a list of base address and size pairs for: 6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control) 7 - second entry: The PINMUX_AUX_* registers (pinmux) 9 Please refer to pinctrl-bindings.txt in this directory for details of the 17 parameters, such as pull-up, tristate, drive strength, etc. 33 include/dt-binding/pinctrl/pinctrl-tegra.h. 35 Required subnode-properties: 36 - nvidia,pins : An array of strings. Each string contains the name of a pin or 39 Optional subnode-properties: [all …]
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| H A D | nvidia,tegra114-pinmux.txt | 4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and 5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as 9 - compatible: "nvidia,tegra114-pinmux" 10 - reg: Should contain the register physical address and length for each of 16 - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes. 17 - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes. 18 - nvidia,lock: Integer. Lock the pin configuration against further changes 20 - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes. 21 - nvidia,rcv-sel: Integer. Select VIL/VIH receivers. 0: normal, 1: high. 22 - nvidia,drive-type: Integer. Valid range 0...3. [all …]
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| H A D | nvidia,tegra210-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmu [all...] |
| H A D | nvidia,tegra124-pinmux.txt | 4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and 5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as 9 - compatible: For Tegra124, must contain "nvidia,tegra124-pinmux". For 10 Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'. 11 - reg: Should contain a list of base address and size pairs for: 12 -- first entry - the drive strength and pad control registers. 13 -- second entry - the pinmux registers 14 -- third entry - the MIPI_PAD_CTRL register 18 include/dt-binding/pinctrl/pinctrl-tegra.h. 19 - nvidia,enable-input: Integer. Enable the pin's input path. [all …]
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| H A D | nvidia,tegra30-pinmux.txt | 4 as described in nvidia,tegra20-pinmux.txt. In fact, this document assumes 9 - compatible: "nvidia,tegra30-pinmux" 10 - reg: Should contain the register physical address and length for each of 14 - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes. 15 - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes. 16 - nvidia,lock: Integer. Lock the pin configuration against further changes 18 - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes. 25 per-pin mux groups: 28 nvidia,enable-input, nvidia,lock. Some support nvidia,open-drain, 29 nvidia,io-reset. [all …]
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| H A D | nvidia,tegra114-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra114-pinmu [all...] |
| H A D | nvidia,tegra124-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmu [all...] |
| H A D | nvidia,tegra30-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra30-pinmu [all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3399-gru-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Chromebook shared properties 8 #include "rk3399-gru.dtsi" 11 pp900_ap: pp900-ap { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp900_ap"; 16 regulator-always-o [all...] |
| /freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/ |
| H A D | pinctrl-tegra.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 14 * Enable/disable for diffeent dt properties. This is applicable for 15 * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain, 16 * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt. 31 /* Rising/Falling slew rate */
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| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra114-roth.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 15 linux,initrd-start = <0x82000000>; 16 linux,initrd-end = <0x82800000>; 24 trusted-foundations { 25 compatible = "tlm,trusted-foundations"; 26 tlm,version-majo [all...] |
| H A D | tegra114-dalmore.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/input/input.h> 23 stdout-path = "serial0:115200n8"; 34 hdmi-supply = <&vdd_5v0_hdmi>; 35 vdd-supply = <&vdd_hdmi_reg>; 36 pll-supply = <&palmas_smps3_reg>; 38 nvidia,ddc-i2 [all...] |
| H A D | tegra30-asus-nexus7-grouper-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/power/summit,smb347-charger.h> 6 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30-cpu-opp.dtsi" 10 #include "tegra30-cpu-opp-microvolt.dtsi" 11 #include "tegra30-asus-lvds-display.dtsi" 27 * pre-existing /chosen node to be available to insert the 33 trusted-foundations { [all …]
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| H A D | tegra124-venice2.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>; [all …]
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| H A D | tegra30-asus-transformer-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra30-cpu-opp.dtsi" 9 #include "tegra30-cp [all...] |
| H A D | tegra30-pegatron-chagall.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30-cpu-op [all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
| H A D | tegra132-norrin.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 30 vdd-supply = <&vdd_3v3_hdmi>; 31 pll-supply = <&vdd_hdmi_pll>; 32 hdmi-supply = <&vdd_5v0_hdmi>; 34 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 35 nvidia,hpd-gpio = 42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | stm32mp135f-dhcor-dhsbc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG 7 * DHCOR PCB number: 718-100 or newer 8 * DHSBC PCB number: 719-100 or newer 11 /dts-v1/; 13 #include <dt-bindings/regulator/st,stm32mp13-regulator.h> 16 #include "stm32mp13xx-dhcor-som.dtsi" 20 compatible = "dh,stm32mp135f-dhcor-dhsbc", 21 "dh,stm32mp135f-dhcor-som", 32 stdout-path = "serial0:115200n8"; [all …]
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| H A D | stm32mp135f-dk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/regulator/st,stm32mp13-regulator.h> 15 #include "stm32mp13-pinctrl.dtsi" 18 model = "STMicroelectronics STM32MP135F-DK Discovery Board"; 19 compatible = "st,stm32mp135f-dk", "st,stm32mp135"; [all …]
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