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/linux/arch/arm/include/asm/
H A Ducontext.h26 /* Last for extensibility. Eight byte aligned because some
27 coprocessors require eight byte alignment. */
36 * these should be a multiple of eight bytes and aligned to eight
/linux/Documentation/arch/mips/
H A Dingenic-tcu.rst8 hardware block. It features up to eight channels, that can be used as
12 have eight channels.
35 - On the oldest SoCs (up to JZ4740), all of the eight channels operate in
49 channels 0-4 and (if eight channels) 6-7 all share one interrupt line;
/linux/drivers/media/cec/usb/pulse8/
H A DKconfig3 tristate "Pulse Eight HDMI CEC"
10 This is a cec driver for the Pulse Eight HDMI CEC device.
/linux/Documentation/hwmon/
H A Daquacomputer_d5next.rst30 The Aquaero devices expose eight physical, eight virtual and four calculated
36 and current, as well as coolant temperature and eight virtual temp sensors. Also
49 as well as eight PWM controllable fans, along with their speed (in RPM), power, voltage
H A Demc1403.rst67 contain up to eight temperature sensors. EMC14x2 support two sensors
70 and EMC14x8 support eight sensors (one internal, seven external).
H A Dmax16065.rst57 simultaneously, and the MAX16066 manages up to eight supply voltages.
69 monitors up to eight supply voltages.
H A Dltc2991.rst28 Through the I2C serial interface, the eight monitors can individually measure
H A Dlm93.rst172 combination of eight control sources. The final PWM is the largest of all
175 The eight control sources are: temp1-temp4 (aka "zones" in the datasheet),
280 All eight GPIOs are read by reading the bitmask in the sysfs file gpio. The
/linux/include/linux/platform_data/
H A Dmax3421-hcd.h14 * MAX3421E GPIO pins. The chip has eight GP inputs and eight GP outputs.
/linux/Documentation/ABI/stable/
H A Dsysfs-driver-ib_srp10 * id_ext, a 16-digit hexadecimal number specifying the eight
14 * ioc_guid, a 16-digit hexadecimal number specifying the eight
125 Description: Eight-byte identifier extension portion of the 16-byte target
132 Description: Eight-byte I/O controller GUID portion of the 16-byte target
/linux/arch/x86/crypto/
H A DKconfig102 Processes eight blocks in parallel.
131 Processes eight blocks in parallel.
162 Processes eight blocks in parallel.
270 Processes eight blocks in parallel.
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsamsung,exynos4210-combiner.yaml18 The interrupt combiner controller consists of multiple combiners. Up to eight
20 combined interrupt for its eight interrupt sources. The combined interrupt is
H A Dloongson,htvec.yaml26 description: Eight parent interrupts that receive chained interrupts.
/linux/Documentation/networking/
H A Darcnet-hardware.rst125 to other segments of the net. They usually have eight connectors. Active
640 The eight switches in group S2 are used to set the node ID.
649 of eight possible I/O Base addresses using the following table::
669 16K block can be located in any of eight positions.
848 The eight switches in group SW3 are used to set the node ID. Each node
934 from 0 to 15 would be possible, but only the following eight values will
1227 There is another array of eight DIP switches at the top of the
1377 The eight switches in SW2 are used to set the node ID. Each node attached
1420 of eight possible I/O Base addresses using the following table::
1440 located in any of eight positions. The address of the Boot Prom is
[all …]
/linux/Documentation/admin-guide/perf/
H A Dalibaba_pmu.rst12 Yitian 710 employs eight DDR5/4 channels, four on each die. Each DDR5 channel
31 to count the total access number of either the eight bank groups in a
/linux/Documentation/admin-guide/
H A Dunicode.rst16 both the eight-bit character sets and UTF-8 mode are changed to use
19 This changes the semantics of the eight-bit character tables subtly.
164 U+F8F8 KLINGON DIGIT EIGHT
/linux/arch/s390/mm/
H A Dmaccess.c59 * Therefore we have a read-modify-write sequence: the function reads eight
60 * bytes from destination at an eight byte boundary, modifies the bytes
/linux/drivers/rtc/
H A Drtc-tegra.c21 /* Set to 1 = busy every eight 32 kHz clocks during copy of sec+msec to AHB. */
59 * eight 32 kHz clocks (~250 us). Outside of these updates the CPU is free to
74 * AHB side) occurs every eight 32 kHz clocks (~250 us). The behavior of this
/linux/include/crypto/
H A Dtwofish.h14 * S-boxes composed with the MDS matrix; w contains the eight "whitening"
/linux/drivers/misc/sgi-xp/
H A Dxp.h50 * exceeds the absolute MAXIMUM number of channels possible (eight), then one
53 * The absolute maximum number of channels possible is limited to eight for
55 * require sixteen bytes per channel, and eight allows all of this
/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,qe-si.yaml13 The SI manages the routing of eight TDM lines to the QE block serial drivers,
/linux/include/linux/mfd/
H A Dntxec.h24 * big-endian, but others only have eight significant bits, which are in the
/linux/Documentation/devicetree/bindings/watchdog/
H A Dcnxt,cx92755-wdt.yaml11 "Agent Communication" block. This block includes the eight programmable system
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dnuvoton,npcm750-adc.yaml14 both have eight channel inputs.
/linux/Documentation/devicetree/bindings/perf/
H A Dmarvell-cn10k-tad.yaml15 performance of last-level cache. Each tad pmu supports up to eight

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