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/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dpanel-edp-legacy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp-legacy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Legacy eDP panels from before the "edp-panel" compatible
10 - Douglas Anderson <dianders@chromium.org>
13 This binding file is a collection of eDP panels from before the generic
14 "edp-panel" compatible was introduced. It is kept around to support old
15 dts files. The only reason one might add a new panel here instead of using
16 the generic "edp-panel" is if it needed to be used on an eDP controller
[all …]
H A Dpanel-edp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Probeable (via DP AUX / EDID) eDP Panels with simple poweron sequences
10 - Douglas Anderson <dianders@chromium.org>
13 This binding file can be used to indicate that an eDP panel is connected
14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
15 actually specifying exactly what panel is connected. This is useful for
16 the case that more than one different panel could be connected to the
[all …]
H A Dsamsung,atna33xc20.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/samsung,atna33xc20.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
10 - Douglas Anderson <dianders@chromium.org>
13 - $ref: panel-common.yaml#
18 # Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
19 - const: samsung,atna33xc20
20 - items:
[all …]
H A Dinnolux,p120zdg-bf1.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/innolux,p120zdg-bf1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel
10 - Sandeep Panda <spanda@codeaurora.org>
11 - Douglas Anderson <dianders@chromium.org>
14 - $ref: panel-common.yaml#
18 const: innolux,p120zdg-bf1
20 enable-gpios: true
[all …]
H A Dsharp,ld-d5116z01b.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/sharp,ld-d5116z01b.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sharp LD-D5116Z01B 12.3" WUXGA+ eDP panel
10 - Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
13 - $ref: panel-common.yaml#
17 const: sharp,ld-d5116z01b
19 power-supply: true
22 no-hpd: true
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dedp.txt1 Qualcomm Technologies Inc. adreno/snapdragon eDP output
4 - compatible:
5 * "qcom,mdss-edp"
6 - reg: Physical base address and length of the registers of controller and PLL
7 - reg-names: The names of register regions. The following regions are required:
8 * "edp"
10 - interrupts: The interrupt signal from the eDP block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: device clocks
13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dps8640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI DSI to eDP Video Format Converter
10 - Nicolas Boichat <drinkcat@chromium.org>
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
14 mobile devices with embedded panel resolutions up to 2048 x 1536. The
17 device outputs eDP v1.4, one or two lanes, at a link rate of up to
28 powerdown-gpios:
32 reset-gpios:
[all …]
H A Dtoshiba,tc358767.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358767/TC358867/TC9595 DSI/DPI/eDP bridge
10 - Andrey Gusakov <andrey.gusakov@cogentembedded.com>
14 converts DSI/DPI to eDP/DP .
19 - items:
20 - enum:
21 - toshiba,tc358867
22 - toshiba,tc9595
[all …]
H A Danx6345.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analogix ANX6345 eDP Transmitter
10 - Torsten Duwe <duwe@lst.de>
13 The ANX6345 is an ultra-low power Full-HD eDP transmitter designed for
24 reset-gpios:
28 dvdd12-supply:
31 dvdd25-supply:
46 Video port for eDP output (panel or connector).
[all …]
H A Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SN65DSI86 DSI to eDP bridge chip
10 - Douglas Anderson <dianders@chromium.org>
13 The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7180-trogdor-parade-ps8640.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Trogdor dts fragment for the boards with Parade ps8640 edp bridge
8 #include <dt-bindings/gpio/gpio.h>
11 pp3300_brij_ps8640: pp3300-brij-ps8640-regulator {
12 compatible = "regulator-fixed";
14 regulator-name = "pp3300_brij_ps8640";
16 regulator-min-microvolt = <3300000>;
17 regulator-max-microvolt = <3300000>;
20 enable-active-high;
22 pinctrl-names = "default";
[all …]
H A Dsc7180-trogdor-ti-sn65dsi86.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge
8 #include <dt-bindings/gpio/gpio.h>
17 off-on-delay-us = <500000>;
22 * extra power cycle of the touchscreen and eDP panel at bootup.
23 * This should help speed bootup because we have off-on-delay-us.
25 regulator-boot-on;
32 clock-frequency = <400000>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>;
[all …]
H A Dsc7180-trogdor-quackingstick.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7180-trogdor.dtsi"
11 #include "sc7180-trogdor-rt5682i-sku.dtsi"
12 #include "sc7180-trogdor-detachable.dtsi"
15 ppvar_lcd: ppvar-lcd-regulator {
16 compatible = "regulator-fixed";
17 regulator-name = "ppvar_lcd";
20 enable-active-high;
21 pinctrl-names = "default";
[all …]
H A Dsc7180-trogdor-wormdingler.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7180-trogdor.dtsi"
11 #include "sc7180-trogdor-detachable.dtsi"
14 avdd_lcd: avdd-lcd-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "avdd_lcd";
19 enable-active-high;
20 pinctrl-names = "default";
21 pinctrl-0 = <&avdd_lcd_en>;
[all …]
H A Dsc7180-trogdor-lazor-limozeen-nots-r9.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7180-trogdor.dtsi"
11 #include "sc7180-trogdor-parade-ps8640.dtsi"
12 #include "sc7180-trogdor-lazo
[all...]
H A Dsc7180-trogdor-mrbland.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7180-trogdor.dtsi"
12 /* This board only has 1 USB Type-C port. */
13 /delete-node/ &usb_c1;
16 avdd_lcd: avdd-lcd-regulator {
17 compatible = "regulator-fixed";
18 regulator-name = "avdd_lcd";
21 enable-active-high;
22 pinctrl-names = "default";
[all …]
H A Dsc7280-herobrine-crd.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-wcd9385.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
27 vreg_edp_bl_crd: vreg-edp-bl-crd-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vreg_edp_bl_crd";
32 enable-active-high;
33 pinctrl-names = "default";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-veyron-edp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Veyron (and derivatives) fragment for the edp displays
9 backlight_regulator: backlight-regulator {
10 compatible = "regulator-fixed";
11 enable-active-high;
13 pinctrl-names = "default";
14 pinctrl-0 = <&bl_pwr_en>;
15 regulator-name = "backlight_regulator";
16 vin-supply = <&vcc33_sys>;
17 startup-delay-us = <15000>;
[all …]
H A Drk3288-veyron-tiger.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-fievel.dts"
10 #include "rk3288-veyron-edp.dtsi"
14 compatible = "google,veyron-tiger-rev8", "google,veyron-tiger-rev7",
15 "google,veyron-tiger-rev6", "google,veyron-tiger-rev5",
16 "google,veyron-tiger-rev4", "google,veyron-tiger-rev3",
17 "google,veyron-tiger-rev2", "google,veyron-tiger-rev1",
18 "google,veyron-tiger-rev0", "google,veyron-tiger",
21 /delete-node/ vcc18-lcd;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Ddp-aux-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
20 of the DP controller under the "aux-bus" node.
22 At the moment, this binding only handles the eDP case. It is
25 bus instead of a panel.
29 const: aux-bus
31 panel:
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8186-corsola-krabby.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
17 remote-endpoint = <&ps8640_in>;
21 clock-frequency = <400000>;
23 edp-bridge@8 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&ps8640_pins>;
28 powerdown-gpios = <&pio 96 GPIO_ACTIVE_LOW>;
[all …]
H A Dmt8186-corsola-steelix.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 pp1000_edpbrdg: regulator-pp1000-edpbrdg {
13 compatible = "regulator-fixed";
14 regulator-name = "pp1000_edpbrdg";
15 pinctrl-names = "default";
16 pinctrl-0 = <&en_pp1000_edpbrdg>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-so
[all...]
/freebsd/sys/contrib/device-tree/Bindings/display/rockchip/
H A Danalogix_dp-rockchip.txt5 - compatible: "rockchip,rk3288-dp",
6 "rockchip,rk3399-edp";
8 - reg: physical base address of the controller and length
10 - clocks: from common clock binding: handle to dp clock.
13 - clock-names: from common clock binding:
16 - resets: Must contain an entry for each entry in reset-names.
19 - pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
20 - pinctrl-0: pin-control mode. should be <&edp_hpd>
22 - reset-names: Must include the name "dp"
24 - rockchip,grf: this soc should set GRF regs, so need get grf here.
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-sapphire-excavator.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3399-sapphire.dtsi"
10 model = "Excavator-RK3399 Board";
11 compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399";
17 adc-keys {
18 compatible = "adc-keys";
19 io-channels = <&saradc 1>;
20 io-channel-names = "buttons";
21 keyup-threshold-microvolt = <1800000>;
[all …]

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