Lines Matching +full:edp +full:- +full:panel
1 Qualcomm Technologies Inc. adreno/snapdragon eDP output
4 - compatible:
5 * "qcom,mdss-edp"
6 - reg: Physical base address and length of the registers of controller and PLL
7 - reg-names: The names of register regions. The following regions are required:
8 * "edp"
10 - interrupts: The interrupt signal from the eDP block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: device clocks
13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
14 - clock-names: the following clocks are required:
20 - #clock-cells: The value should be 1.
21 - vdda-supply: phandle to vdda regulator device node
22 - lvl-vdd-supply: phandle to regulator device node which is used to supply power
24 - panel-en-gpios: GPIO pin to supply power to panel.
25 - panel-hpd-gpios: GPIO pin used for eDP hpd.
30 compatible = "qcom,mdss-edp";
31 reg-names =
32 "edp",
36 interrupt-parent = <&mdss_mdp>;
38 power-domains = <&mmcc MDSS_GDSC>;
39 clock-names =
51 #clock-cells = <1>;
52 vdda-supply = <&pma8084_l12>;
53 lvl-vdd-supply = <&lvl_vreg>;
54 panel-en-gpios = <&tlmm 137 0>;
55 panel-hpd-gpios = <&tlmm 103 0>;