dynamically\-programmable (full) in projects: linux

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Searched +full:dynamically +full:- +full:programmable (Results 1 – 25 of 26) sorted by relevance

/linux/drivers/usb/gadget/udc/
H A D	Kconfig	1 # SPDX-License-Identifier: GPL-2.0 7 # NOTE: Gadget support DOES NOT depend on host-side CONFIG_USB !! 9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks). 10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks). 11 # - Some systems have both kinds of controllers. 13 # With help from a special transceiver and a "Mini-AB" jack, systems with 14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG). 22 # - integrated/SOC controllers first 23 # - licensed IP used in both SOC and discrete versions 24 # - discrete ones (including all PCI-only controllers) [all …]
/linux/Documentation/devicetree/bindings/iio/dac/
H A D	adi,ad5758.yaml	`1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Hennerich <Michael.Hennerich@analog.com> 19 spi-cpha: true 21 adi,dc-dc-mode: 25 Mode of operation of the dc-to-dc converter 28 dynamically regulates the supply voltage, VDPC+, to meet compliance 31 Programmable Power Control (PPC) 32 In this mode, the VDPC+ voltage is user-programmable to a fixed level [all …]`
/linux/Documentation/sound/soc/
H A D	pops-clicks.rst	`11 because the components within the subsystem are being dynamically powered 23 shutdown and follows some basic rules:- 26 Startup Order :- DAC --> Mixers --> Output PGA --> Digital Unmute 28 Shutdown Order :- Digital Mute --> Output PGA --> Mixers --> DAC 31 a PGA (programmable gain amplifier) before being output to the speakers. 43 Startup Order - Input PGA --> Mixers --> ADC 45 Shutdown Order - ADC --> Mixers --> Input PGA`
/linux/drivers/hwmon/
H A D	powr1220.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * powr1220.c - Driver for the Lattice POWR1220 programmable power supply 17 #include <linux/hwmon-sysfs.h> 114 mutex_lock(&data->update_lock); in powr1220_read_adc() 116 if (time_after(jiffies, data->adc_last_updated[ch_num] + HZ) \|\| in powr1220_read_adc() 117 !data->adc_valid[ch_num]) { in powr1220_read_adc() 121 * for. We dynamically set the attenuator depending on the in powr1220_read_adc() 124 if (data->adc_maxes[ch_num] > ADC_MAX_LOW_MEASUREMENT_MV \|\| in powr1220_read_adc() 125 data->adc_maxes[ch_num] == 0) in powr1220_read_adc() 129 result = i2c_smbus_write_byte_data(data->client, ADC_MUX, in powr1220_read_adc() [all …]
/linux/drivers/clocksource/
H A D	Kconfig	1 # SPDX-License-Identifier: GPL-2.0-only 60 bool "OMAP dual-mode timer driver" if ARCH_K3 \|\| COMPILE_TEST 64 Enables the support for the TI dual-mode timer driver. 198 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture, 220 to multiple interrupt generating programmable 221 32-bit free running decrementing counters. 256 bool "Integrator-AP timer driver" if COMPILE_TEST 259 Enables support for the Integrator-AP timer. 284 available on many OMAP-like platforms. 303 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST [all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	pipeline.json	8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.", 128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 146 "BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).", 150 "PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).", 177 "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired.", 204 "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.", 212 "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.", 229 "PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events.", 355 "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-lin [all...]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	pipeline.json	8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.", 128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 146 "BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).", 150 "PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).", 177 "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired.", 204 "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.", 212 "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.", 229 "PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events.", 355 "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-lin [all...]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	pipeline.json	8 …y executing divide or square root operations. Accounts for integer and floating-point operations.", 128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 146 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX … 150 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE… 177 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that… 204 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread … 212 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa… 229 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa… 374 …dynamically changing prefix length of the decoded instruction (by operand size prefix instruction … 388 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event", [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	pipeline.json	8 …y executing divide or square root operations. Accounts for integer and floating-point operations.", 128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 146 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX … 150 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE… 177 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that… 204 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread … 212 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa… 229 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa… 355 …dynamically changing prefix length of the decoded instruction (by operand size prefix instruction … 369 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event", [all …]
/linux/drivers/pwm/
H A D	pwm-tegra.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * drivers/pwm/pwm-tegra.c 5 * Tegra pulse-width-modulation controller driver 7 * Copyright (c) 2010-2020, NVIDIA Corporation. 8 * Based on arch/arm/plat-mxc/pwm.c by Sascha Hauer <s.hauer@pengutronix.de> 11 * 1. 13-bit: Frequency division (SCALE) 12 * 2. 8-bit : Pulse division (DUTY) 13 * 3. 1-bit : Enable bit 16 * on the programmable frequency division value to generate the required 28 * - When PWM is disabled, the output is driven to inactive. [all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	pipeline.json	3 …y executing divide or square root operations. Accounts for integer and floating-point operations.", 130 …"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Cou… 187 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that… 228 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa… 263 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa… 412 …dynamically changing prefix length of the decoded instruction (by operand size prefix instruction … 429 …-ops, Counts the retirement of the last micro-op of the instruction. Counting continues during har… 434 "BriefDescription": "Number of instructions retired. General Counter - architectural event", 439 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in… 488 …"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path … [all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	pipeline.json	3 …y executing divide or square root operations. Accounts for integer and floating-point operations.", 130 …"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Cou… 187 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that… 228 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa… 263 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa… 412 …dynamically changing prefix length of the decoded instruction (by operand size prefix instruction … 429 …-ops, Counts the retirement of the last micro-op of the instruction. Counting continues during har… 434 "BriefDescription": "Number of instructions retired. General Counter - architectural event", 439 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in… 488 …"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path … [all …]
/linux/tools/perf/pmu-events/arch/x86/skylake/
H A D	pipeline.json	3 …y executing divide or square root operations. Accounts for integer and floating-point operations.", 130 …"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Cou… 218 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa… 253 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa… 402 …dynamically changing prefix length of the decoded instruction (by operand size prefix instruction … 419 …-ops, Counts the retirement of the last micro-op of the instruction. Counting continues during har… 424 "BriefDescription": "Number of instructions retired. General Counter - architectural event", 429 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in… 478 …"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path … 535 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F… [all …]
/linux/drivers/net/
H A D	Kconfig	1 # SPDX-License-Identifier: GPL-2.0-only 25 # All the following symbols are dependent on NETDEVICES - do not repeat 63 This is essentially a bit-bucket device (i.e. traffic you send to 133 section 6.2 of the NET-3-HOWTO, available from 169 tristate "MAC-VLAN support" 175 iproute2 package starting with the iproute2-2.6.23 release: 183 tristate "MAC-VLAN based tap driver" 189 on the MAC-VLAN network interface, called macvtap. A macvtap device 203 tristate "IP-VLAN support" 213 iproute2 package starting with the iproute2-3.19 release: [all …]
/linux/Documentation/spi/
H A D	spi-summary.rst	5 02-Feb-2012 8 ------------ 17 clocking modes through which data is exchanged; mode-0 and mode-3 are most 32 - SPI may be used for request/response style device protocols, as with 35 - It may also be used to stream data in either direction (half duplex), 38 - Some devices may use eight bit words. Others may use different word 39 lengths, such as streams of 12-bit or 20-bit digital samples. 41 - Words are usually sent with their most significant bit (MSB) first, 44 - Sometimes SPI is used to daisy-chain devices, like shift registers. 51 SPI is only one of the names used by such four-wire protocols, and [all …]
/linux/Documentation/networking/
H A D	scaling.rst	`1 .. SPDX-License-Identifier: GPL-2.0 13 multi-processor systems. 17 - RSS: Receive Side Scaling 18 - RPS: Receive Packet Steering 19 - RFS: Receive Flow Steering 20 - Accelerated Receive Flow Steering 21 - XPS: Transmit Packet Steering 28 (multi-queue). On reception, a NIC can send different packets to different 33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and 35 Multi-queue distribution can also be used for traffic prioritization, but [all …]`
/linux/drivers/gpio/
H A D	Kconfig	1 # SPDX-License-Identifier: GPL-2.0-only 26 using a stack allocated buffer to a dynamically allocated buffer. 50 this symbol, but new drivers should use the generic gpio-regmap 60 non-sleeping contexts. They can make bitbanged serial protocols 81 numberspace-based functionalities of the sysfs interface. 137 Enables support for the idio-16 library functions. The idio-16 library 139 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16. 141 If built as a module its name will be gpio-idio-16. 147 tristate "GPIO driver for 74xx-ICs with MMIO access" 151 Say yes here to support GPIO functionality for 74xx-compatible ICs [all …]
/linux/drivers/net/ethernet/sun/
H A D	cassini.h	1 /* SPDX-License-Identifier: GPL-2.0+ / 29 / cassini register map: 2M memory mapped in 32-bit memory space accessible as 30 * 32-bit words. there is no i/o port access. REG_ addresses are 62 /* top level interrupts [0-9] are auto-cleared to 0 when the status 63 * register is read. second level interrupts [13 - 18] are cleared at 64 * the source. tx completion register 3 is replicated in [19 - 31] 95 programmable threshold # 99 programmable threshold # 104 len of non-reassembly pkt 183 #define BIM_CFG_64BIT_DISABLE 0x004 /* disable 64-bit mode */ [all …]
/linux/drivers/platform/x86/hp/
H A D	hp-wmi.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 22 #include <linux/input/sparse-keymap.h> 38 MODULE_ALIAS("wmi:95F24279-4D7B-4334-9387-ACCDC67EF61C"); 39 MODULE_ALIAS("wmi:5FB7F034-2C63-45E9-BE91-3D44E2C707E4"); 41 #define HPWMI_EVENT_GUID "95F24279-4D7B-4334-9387-ACCDC67EF61C" 42 #define HPWMI_BIOS_GUID "5FB7F034-2C63-45E9-BE91-3D44E2C707E4" 90 /* DMI Board names of Victus 16-d1xxx laptops / 95 / DMI Board names of Victus 16-r1000 and Victus 16-s1000 laptops / 131 struct bios_args buffer is dynamically allocated. New WMI command types 132 * were introduced that exceeds 128-byte data size. Changes to handle [all …]
/linux/Documentation/admin-guide/
H A D	kernel-parameters.txt	`16 force -- enable ACPI if default was off 17 on -- enable ACPI but allow fallback to DT [arm64,riscv64] 18 off -- disable ACPI if default was on 19 noirq -- do not use ACPI for IRQ routing 20 strict -- Be less tolerant of platforms that are not 22 rsdt -- prefer RSDT over (default) XSDT 23 copy_dsdt -- copy DSDT to memory 24 nocmcff -- Disable firmware first mode for corrected 28 nospcr -- disable console in ACPI SPCR table as 45 If set to vendor, prefer vendor-specific driver [all …]`
/linux/include/uapi/linux/
H A D	bpf.h	1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / 2 / Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com 21 #define BPF_DW 0x18 /* double word (64-bit) / 23 #define BPF_ATOMIC 0xc0 / atomic memory ops - op type in immediate / 24 #define BPF_XADD 0xc0 / exclusive add - legacy name / 32 #define BPF_TO_LE 0x00 / convert to little-endian / 33 #define BPF_TO_BE 0x08 / convert to big-endian / 52 #define BPF_CMPXCHG (0xf0 \| BPF_FETCH) / atomic compare-and-write / 54 #define BPF_LOAD_ACQ 0x100 / load-acquire / 55 #define BPF_STORE_REL 0x110 / store-release */ [all …]
/linux/tools/include/uapi/linux/
H A D	bpf.h	1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / 2 / Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com 21 #define BPF_DW 0x18 /* double word (64-bit) / 23 #define BPF_ATOMIC 0xc0 / atomic memory ops - op type in immediate / 24 #define BPF_XADD 0xc0 / exclusive add - legacy name / 32 #define BPF_TO_LE 0x00 / convert to little-endian / 33 #define BPF_TO_BE 0x08 / convert to big-endian / 52 #define BPF_CMPXCHG (0xf0 \| BPF_FETCH) / atomic compare-and-write / 54 #define BPF_LOAD_ACQ 0x100 / load-acquire / 55 #define BPF_STORE_REL 0x110 / store-release */ [all …]
/linux/drivers/comedi/drivers/
H A D	s626.c	1 // SPDX-License-Identifier: GPL-2.0+ 6 * COMEDI - Linux Control and Measurement Device Interface 10 * Copyright (C) 2002-2004 Sensoray Co., Inc. 68 * struct s626_private - Working data for s626 driver. 69 * @ai_cmd_running: non-zero if ai_cmd is running. 98 #define S626_INDXMASK(C) (1 << (((C) > 2) ? ((C) * 2 - 1) : ((C) * 2 + 4))) 110 writel(val, dev->mmio + reg); in s626_mc_enable() 116 writel(cmd << 16, dev->mmio + reg); in s626_mc_disable() 124 val = readl(dev->mmio + reg); in s626_mc_test() 129 #define S626_BUGFIX_STREG(REGADRS) ((REGADRS) - 4) [all …]
/linux/drivers/video/fbdev/
H A D	amifb.c	2 * linux/drivers/video/amifb.c -- Amiga builtin chipset frame buffer device 4 * Copyright (C) 1995-2003 Geert Uytterhoeven 30 * - 24 Jul 96: Copper generates now vblank interrupt and 32 * - 14 Jul 96: Rework and hopefully last ECS bugs fixed 33 * - 7 Mar 96: Hardware sprite support by Roman Zippel 34 * - 18 Feb 96: OCS and ECS support by Roman Zippel 36 * - 2 Dec 95: AGA version by Geert Uytterhoeven 107 --------------------- 111 +----------+---------------------------------------------+----------+-------+ 115 +----------###############################################----------+-------+ [all …]
/linux/Documentation/virt/kvm/
H A D	api.rst	1 .. SPDX-License-Identifier: GPL-2.0 4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation 24 - System ioctls: These query and set global attributes which affect the 28 - VM ioctls: These query and set attributes that affect an entire virtual 35 - vcpu ioctls: These query and set attributes that control the operation 43 - device ioctls: These query and set attributes that control the operation 92 facility that allows backward-compatible extensions to the API to be 133 ----------------------- 150 ----------------- 189 address used by the VM. The IPA_Bits is encoded in bits[7-0] of the [all …]