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/freebsd/sys/contrib/device-tree/Bindings/iio/dac/
H A Dad5758.txt4 - compatible: Must be "adi,ad5758"
5 - reg: SPI chip select number for the device
6 - spi-max-frequency: Max SPI frequency to use (< 50000000)
7 - spi-cpha: is the only mode that is supported
11 - adi,dc-dc-mode: Mode of operation of the dc-to-dc converter
14 voltage and dynamically regulates the supply voltage,
18 Programmable Power Control (PPC)
19 In this mode, the VDPC+ voltage is user-programmable to
36 - adi,range-microvolt: Voltage output range
40 * <(-5000000) 5000000>: ±5 V voltage range
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H A Dadi,ad5758.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michae
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/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dti,tmp108.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The TMP108 is a digital-output temperature sensor with a
14 dynamically-programmable limit window, and under- and overtemperature
23 - ti,tmp108
27 - description: alert interrupt
32 "#thermal-sensor-cells":
35 vcc-supply:
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dsilabs,si5341.txt1 Binding for Silicon Labs Si5340, Si5341 Si5342, Si5344 and Si5345 programmable
6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
12 The Si5341 and Si5340 are programmable i2c clock generators with up to 10 output
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
33 - compatible: shall be one of the following:
34 "silabs,si5340" - Si5340 A/B/C/D
35 "silabs,si5341" - Si5341 A/B/C/D
36 "silabs,si5342" - Si5342 A/B/C/D
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/freebsd/sys/arm/xilinx/
H A Dzy7_machdep.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * Machine dependent code for Xilinx Zynq-7000 Soc.
32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
60 * Set up static device mappings. Not strictly necessary -- simplebus will
61 * dynamically establish mappings as needed -- but doing it this way gets us
99 FDT_PLATFORM_DEF(zynq7, "zynq7", 0, "xlnx,zynq-7000", 200);
/freebsd/lib/libpmc/
H A Dpmc.31 .\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved.
40 The library is implemented using the lower-level facilities offered by
50 .Bl -bullet
53 These PMCs measure events in a whole-system manner, i.e., independent
57 Non-privileged process are allowed to allocate system scope PMCs if the
61 is non-zero.
72 .Bl -bullet
90 The library uses human-readable strings to name the event being
99 Additionally, process-scope PMCs have to be attached to one or more
101 A process-scope PMC may be attached to those target processes
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/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dcoresight.txt11 * Required properties for all components *except* non-configurable replicators
12 and non-configurable funnels:
16 - Embedded Trace Buffer (version 1.0):
17 "arm,coresight-etb10", "arm,primecell";
19 - Trace Port Interface Unit:
20 "arm,coresight-tpiu", "arm,primecell";
22 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
26 "arm,coresight-tmc", "arm,primecell";
28 - Trace Programmable Funnel:
29 "arm,coresight-dynamic-funnel", "arm,primecell";
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/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Domap-mailbox.txt16 programmable through a set of interrupt configuration registers, and have a rx
25 routed to different processor sub-systems on DRA7xx as they are routed through
38 a SoC. The sub-mailboxes are represented as child nodes of this parent node.
41 --------------------
42 - compatible: Should be one of the following,
43 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
44 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
45 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx,
47 "ti,am654-mailbox" for K3 AM65x and J721E SoCs
48 "ti,am64-mailbox" for K3 AM64x SoCs
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A Dpipeline.json10 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
158 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
182 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
189 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
248 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
259 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
282 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
450dynamically changing prefix length of the decoded instruction (by operand size prefix instruction …
468 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
474- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
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/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A Dpipeline.json10 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
156 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
180 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
187 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
244 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
254 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
275 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
452dynamically changing prefix length of the decoded instruction (by operand size prefix instruction …
468 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
474- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A Dpipeline.json10 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
158 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
182 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
189 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
248 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
259 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
282 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
450dynamically changing prefix length of the decoded instruction (by operand size prefix instruction …
468 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
474- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A Dpipeline.json3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
210 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa…
249 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa…
415dynamically changing prefix length of the decoded instruction (by operand size prefix instruction …
434-ops, Counts the retirement of the last micro-op of the instruction. Counting continues during har…
439 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
445 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
486 …"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path …
550 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
561 …"PublicDescription": "Counts the cycles when 4 uops are delivered by the LSD (Loop-stream detector…
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/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A Dpipeline.json3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
210 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa…
249 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa…
415dynamically changing prefix length of the decoded instruction (by operand size prefix instruction …
434-ops, Counts the retirement of the last micro-op of the instruction. Counting continues during har…
439 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
445 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
486 …"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path …
550 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
561 …"PublicDescription": "Counts the cycles when 4 uops are delivered by the LSD (Loop-stream detector…
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A Dpipeline.json3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
210 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa…
249 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa…
415dynamically changing prefix length of the decoded instruction (by operand size prefix instruction …
434-ops, Counts the retirement of the last micro-op of the instruction. Counting continues during har…
439 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
445 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
486 …"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path …
550 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
561 …"PublicDescription": "Counts the cycles when 4 uops are delivered by the LSD (Loop-stream detector…
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/freebsd/share/doc/papers/sysperf/
H A D3.t51 on one machine, a VAX-11/780 with eight megabytes of memory.\**
58 person-to-person telephone messages to per-organization distribution
83 pseudo-terminal handler in addition to the local hardware terminal
113 Micro-operation benchmarks
117 programs was constructed and run on a VAX-11/750 with 4.5 megabytes
159 pipeself4 send 10,000 4-byte messages to yourself
160 pipeself512 send 10,000 512-byte messages to yourself
161 pipediscard4 send 10,000 4-byte messages to child who discards
162 pipediscard512 send 10,000 512-byte messages to child who discards
163 pipeback4 exchange 10,000 4-byte messages with child
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/freebsd/sys/cddl/contrib/opensolaris/uts/common/sys/
H A Ddtrace_impl.h172 * +------------------------+
173 * | dtrace_epid_t ---------+--------------> Enabled Probe ID (EPID)
174 * | dtrace_state_t * ------+--------------> State associated with this ECB
175 * | dtrace_predicate_t * --+---------+
176 * | dtrace_action_t * -----+----+ |
177 * | dtrace_ecb_t * ---+ | | | Predicate (if any)
178 * +-------------------+----+ | | dtrace_predicate_t
179 * | | +---> +--------------------+
180 * | | | dtrace_difo_t * ---+----> DIFO
181 * | | +--------------------+
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/freebsd/share/man/man4/
H A Dnetgraph.41 .\" Copyright (c) 1996-1999 Whistle Communications, Inc.
19 .\" MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
63 .Bl -bullet -compact
69 A common framework for kernel entities to inter-communicate.
71 A reasonably fast, kernel-based implementation.
90 In object-oriented language, types are classes, and nodes are instances
114 which is expressed as a 32-bit hexadecimal value.
128 .Bl -bullet
157 in preference to the general node-wide methods.
180 There are generic and type-specific control messages.
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/freebsd/sbin/ipfw/
H A Dipfw.88 in-kernel NAT.
19 .Op Ar rule | first-last ...
49 .Oo Cm set Ar N Oc Cm table Ar name Cm create Ar create-options
55 .Oo Cm set Ar N Oc Cm table Ar name Cm modify Ar modify-options
59 .Oo Cm set Ar N Oc Cm table Ar name Cm add Ar table-key Op Ar value
61 .Oo Cm set Ar N Oc Cm table Ar name Cm add Op Ar table-key Ar value ...
63 .Oo Cm set Ar N Oc Cm table Ar name Cm atomic add Op Ar table-key Ar value ...
65 .Oo Cm set Ar N Oc Cm table Ar name Cm delete Op Ar table-key ...
93 .Ar config-options
99 .Ss IN-KERNEL NAT
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/freebsd/contrib/tcsh/
H A DFixes1 15. V6.22.04 - 20210426
2 14. Don't crash with 'bindkey "^0" clear-screen' (Karl Jeacle)
4 12. V6.22.03 - 20201118
14 4. V6.22.02 - 20191204
16 2. V6.22.01 - 20191201
23 6. V6.22.00 - 20191128
24 5. PR/113: Sobomax: avoid infinite loops for -c commands when stdout is
31 range character instead of the start of range. [l-z]* would match foo
33 12. V6.21.00 - 20190508
48 20. V6.20.00 - 20161124
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/freebsd/sys/dev/hwpmc/
H A Dpmc_events.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
43 * __PMC_EV(CLASS, SYMBOLIC-NAME)
57 * Software events are dynamically defined.
63 #define PMC_EV_SOFT_LAST (PMC_EV_SOFT_FIRST + PMC_EV_DYN_COUNT - 1)
154 * from the "Intel 64 and IA-32 Architectures Software Developer's
166 __PMC_EV_ALIAS("instruction-retired", IAF_INSTR_RETIRED_ANY) \
167 __PMC_EV_ALIAS("unhalted-core-cycles", IAF_CPU_CLK_UNHALTED_CORE) \
168 __PMC_EV_ALIAS("unhalted-reference-cycles", IAF_CPU_CLK_UNHALTED_REF)
551 * NB: ARMv8.1 extends this to a 16-bit encoding, but we only define the 10-bit
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/freebsd/contrib/ntp/
H A DNEWS1 ---
10 - changes crypto (OpenSSL or compatible) detection and default build behavior.
11 Previously, crypto was supported if available unless the --without-crypto
13 falling back to a crypto-free build if usable libcrypto was not found has
15 The --withou
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/freebsd/sys/dev/iwm/
H A Dif_iwmreg.h10 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
35 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
73 * BEGIN iwl-csr.h
81 * low power states due to driver-invoked device resets
82 * (e.g. IWM_CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
95 #define IWM_CSR_INT_COALESCING (0x004) /* accum ints, 32-usec units */
109 * 31-16: Reserved
110 * 15-
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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/freebsd/contrib/ncurses/misc/
H A Dterminfo.src7 # bug-ncurses@gnu.org
19 # under the ncurses MIT-style license. That was the effect of the agreement
33 # some portions of the data are derivative work under a compatible MIT-style
36 #------------------------------------------------------------------------------
37 # https://invisible-island.net/ncurses/ncurses.faq.html#terminfo_copying
38 # https://invisible-island.net/personal/copyrights.html#removing_notes
39 #------------------------------------------------------------------------------
48 # Please e-mail changes to terminfo@thyrsus.com; the old termcap@berkeley.edu
54 # This file describes the capabilities of various character-cell terminals,
55 # as needed by software such as screen-oriented editors.
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/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h1 /*-
34 * Copyright(c) 2001-2024, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
128 /* Engine CKV - The encrypted data. */
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