pmc: remove last bits of AMD K7 CPU support

This includes event definitions from sys/pmc_events.h, definitions from
sys/pmc.h, and the man pages.

Reviewed by: jkoshy
Sponsored by: The FreeBSD Found

pmc: remove last bits of AMD K7 CPU support

This includes event definitions from sys/pmc_events.h, definitions from
sys/pmc.h, and the man pages.

Reviewed by: jkoshy
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D41275

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sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

pmc_events.h: update top-level comment

It points to non-existent documentation. The wiki page still contains a
useful overview, so keep this link.

MFC after: 3 days
Sponsored by: The FreeBSD Founda

pmc_events.h: update top-level comment

It points to non-existent documentation. The wiki page still contains a
useful overview, so keep this link.

MFC after: 3 days
Sponsored by: The FreeBSD Foundation

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spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

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pmc_events.h: event list formatting

Improve the legibility of the list. Bump overall indentation, fix some
whitespace, and sort the IAF block.

Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: T

pmc_events.h: event list formatting

Improve the legibility of the list. Bump overall indentation, fix some
whitespace, and sort the IAF block.

Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39903

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pmc_events.h: update event list comment

This comment is no longer in sync with the contents of __PMC_EVENTS().
Update to reflect the removal of various Intel event definitions from
this list; these

pmc_events.h: update event list comment

This comment is no longer in sync with the contents of __PMC_EVENTS().
Update to reflect the removal of various Intel event definitions from
this list; these event definitions now come from Linux and live in
lib/libpmc/pmu-events/.

Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39902

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hwpmc: remove remaining UCP event definitions

Although this block has remained in __PMC_EVENTS(), there is no handling
of UCP in libpmc/libpmc.c, so it is not possible to select one of these
events.

hwpmc: remove remaining UCP event definitions

Although this block has remained in __PMC_EVENTS(), there is no handling
of UCP in libpmc/libpmc.c, so it is not possible to select one of these
events. It should therefore be impossible to trigger the code removed
from ucp_start_pmc(). Note that the GQ_SNOOP_MSF MSR exists only for
Nehalem and Westmere architectures, and the related events do not exist
for later generations.

The Uncore support in hwpmc has severely atrophied in general. We have
uncore event definitions in pmu-events, but the kernel support was
written against Intel Performance Measurement Architecture version 2,
and is disabled for processor generations later than Westmere. Nehalem
and Westmere lack uncore event definitions in pmu-events. I'd be
surprised if Uncore support is usable on any machine in its current
state.

Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39901

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hwpmc: drop vestigial IAP event definitions

These are maintained elsewhere. No functional change.

Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision:

hwpmc: drop vestigial IAP event definitions

These are maintained elsewhere. No functional change.

Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39900

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hwpmc: Define full set of Armv8.0 events

Like many of the other encodings here, none of these are actually used
by our tables. However, defining the EVENT_xH names allows them to be
used by the user

hwpmc: Define full set of Armv8.0 events

Like many of the other encodings here, none of these are actually used
by our tables. However, defining the EVENT_xH names allows them to be
used by the user (e.g. when trying to use an implementation-defined
event that they know about from their core's documentation but we don't)
and allows us to define PMC_EV_ARMV8_LAST appropriately.

Some of these are also used downstream in CheriBSD on Morello.

Reviewed by: andrew, tsoome
Obtained from: CheriBSD
Differential Revision: https://reviews.freebsd.org/D36926

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hwpmc: Move DMC-620 and CMN-600 events to allow for full Armv8.0 space

The documented encoding space for Armv8 was only 8 bits, but v8.0 has
always had a 10-bit encoding space for its events, and do

hwpmc: Move DMC-620 and CMN-600 events to allow for full Armv8.0 space

The documented encoding space for Armv8 was only 8 bits, but v8.0 has
always had a 10-bit encoding space for its events, and downstream in
CheriBSD we relied on this full space. This worked until the DMC-620 and
CMN-600 events were added, trampling on what should have been reserved
for Armv8.0 right from the start. Thus, renumber the DMC-620 and CMN-600
events to not do this before they make it into a stable release,
allowing for the full Armv8.0 encoding space to be used without having
to split it across two different regions.

Note that Armv8.1 grows the encoding space to 16 bits, which doesn't fit
well with our current approach. No attempt is made to allow for these
events in this change, only the ones that have always been valid (according to
the hardware) from the first commit of Armv8 support to hwpmc.

Reviewed by: arichardson, tsoome
Differential Revision: https://reviews.freebsd.org/D36925

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Allocate event for DMC-620 and CMN-600 controllers PMU. Add events supported by DMC-620 and CMN-600 controllers PMU.

Allocate event for DMC-620 and CMN-600 controllers PMU.
Add events supported by D

Allocate event for DMC-620 and CMN-600 controllers PMU. Add events supported by DMC-620 and CMN-600 controllers PMU.

Allocate event for DMC-620 and CMN-600 controllers PMU.
Add events supported by DMC-620 and CMN-600 controllers PMU.

Reviewed by: bz
Sponsored By: ARM
Sponsored By: Ampere Computing
Differential Revision: https://reviews.freebsd.org/D35609

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hwpmc: remove mips event definitions

Reviewed by: imp, emaste
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D34084

libpmc: fix the 'cycles' event alias on x86

Looking for "tsc-tsc" in the pmu tables will fail every time. Instead,
make this an alias for the static TSC event defined in pmc_events.h.
This fixes 'pm

libpmc: fix the 'cycles' event alias on x86

Looking for "tsc-tsc" in the pmu tables will fail every time. Instead,
make this an alias for the static TSC event defined in pmc_events.h.
This fixes 'pmcstat -s cycles' on Intel and AMD.

Reviewed by: emaste
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D32197

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hwpmc: remove static POWER8 definitions

After b48a2770d48b, static POWER8 definitions became unnecessary,
as all of them (and much more) are already present in libpmc's
PMU events.

Submitted by: L

hwpmc: remove static POWER8 definitions

After b48a2770d48b, static POWER8 definitions became unnecessary,
as all of them (and much more) are already present in libpmc's
PMU events.

Submitted by: Leonardo Bianconi <leonardo.bianconi@eldorado.org.br> (initial version)
Reviewed by: kbowling, mhorne
Sponsored by: Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision: https://reviews.freebsd.org/D31334

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PMC: remove now orphaned PMC for INTEL XScale processors.
Support for XScale architecture has been deleted in FreeBSD 13.

[PowerPC] hwpmc: add support for POWER8/9 PMCs

This change adds support for POWER8 and POWER9 PMCs (bare metal and
pseries).
All PowerISA 2.07B non-random events are supported.

Implementation was b

[PowerPC] hwpmc: add support for POWER8/9 PMCs

This change adds support for POWER8 and POWER9 PMCs (bare metal and
pseries).
All PowerISA 2.07B non-random events are supported.

Implementation was based on that of PPC970.

Reviewed by: jhibbits
Sponsored by: Eldorado Research Institute (eldorado.org.br)
Differential Revision: https://reviews.freebsd.org/D26110

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Merge ^/head r364082 through r364250.

MFH

Sponsored by: Rubicon Communications, LLC (netgate.com)

Add support for Cortex-A76/Neoverse-N1 to hwpmc

This adds support for the Cortex-A76 and Neoverse-N1 PMU counters to pmc.

While here add more PMCR_IDCODE values and check the implementers code is
c

Add support for Cortex-A76/Neoverse-N1 to hwpmc

This adds support for the Cortex-A76 and Neoverse-N1 PMU counters to pmc.

While here add more PMCR_IDCODE values and check the implementers code is
correct before setting the PMU type.

Reviewed by: bz, emaste (looks reasonable to me)
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D25959

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Merge ^/head r352436 through r352536.

Add support for BERI statcounters.

BERI stands for Bluespec Extensible RISC Implementation, based on MIPS.

BERI has not implemented standard MIPS perfomance monitoring counters,
instead it provides

Add support for BERI statcounters.

BERI stands for Bluespec Extensible RISC Implementation, based on MIPS.

BERI has not implemented standard MIPS perfomance monitoring counters,
instead it provides statistical counters.

BERI statcounters have a several limitations:
- They can't be written
- They don't support start/stop operation
- None of hardware interrupt is provided on a counter overflow.

So make it separate to hwpmc_mips module and support process/system
counting mode only.

Sponsored by: DARPA, AFRL

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MFH @ r337607, in preparation for boarding

Revert r336773: it removed too much.

r336773 removed all things xscale. However, some things xscale are
really armv5. Revert that entirely. A more modest removal will follow.

Noticed by: andrew@

Remove xscale support

The OLD XSCALE stuff hasn't been useful in a while. The original
committer (cognet@) was the only one that had boards for it. He's
blessed this removal. Newer XSCALE (GUMSTIX)

Remove xscale support

The OLD XSCALE stuff hasn't been useful in a while. The original
committer (cognet@) was the only one that had boards for it. He's
blessed this removal. Newer XSCALE (GUMSTIX) is for hardware that's
quite old. After discussion on arm@, it was clear there was no support
for keeping it.

Differential Review: https://reviews.freebsd.org/D16313

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