| /linux/Documentation/devicetree/bindings/net/ | 
| H A D | toshiba,visconti-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/net/toshiba,visconti-dwmac.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Toshiba Visconti DWMAC Ethernet controller
 10   - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
 17           - toshiba,visconti-dwmac
 19     - compatible
 22   - $ref: snps,dwmac.yaml#
 27       - items:
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| H A D | thead,th1520-gmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/net/thead,th1520-gmac.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: T-HEAD TH1520 GMAC Ethernet controller
 10   - Drew Fustini <dfustini@tenstorrent.com>
 14   https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
 17     - Compliant with IEEE802.3 Specification
 18     - IEEE 1588-2008 standard for precision networked clock synchronization
 19     - Supports 10/100/1000Mbps data transfer rate
 [all …]
 
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| H A D | sophgo,cv1800b-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/net/sophgo,cv1800b-dwmac.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Sophgo CV1800B DWMAC glue layer
 10   - Inochi Amaoto <inochiama@gmail.com>
 17           - sophgo,cv1800b-dwmac
 19     - compatible
 24       - const: sophgo,cv1800b-dwmac
 25       - const: snps,dwmac-3.70a
 [all …]
 
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| H A D | starfive,jh7110-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---
 5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
 8 title: StarFive JH7110 DWMAC glue layer
 11   - Emil Renner Berthing <kernel@esmil.dk>
 12   - Samin Guo <samin.guo@starfivetech.com>
 19           - starfive,jh7100-dwmac
 20           - starfive,jh7110-dwmac
 22     - compatible
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| H A D | intel,dwmac-plat.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Intel DWMAC glue layer
 10   - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
 17           - intel,keembay-dwmac
 19     - compatible
 22   - $ref: snps,dwmac.yaml#
 27       - items:
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| H A D | loongson,ls1b-gmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/net/loongson,ls1b-gmac.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Loongson-1B Gigabit Ethernet MAC Controller
 10   - Keguang Zhang <keguang.zhang@gmail.com>
 13   Loongson-1B Gigabit Ethernet MAC Controller is based on
 17   - Dual 10/100/1000Mbps GMAC controllers
 18   - Full-duplex operation (IEEE 802.3x flow control automatic transmission)
 19   - Half-duplex operation (CSMA/CD Protocol and back-pressure support)
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| H A D | loongson,ls1c-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/net/loongson,ls1c-emac.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Loongson-1C Ethernet MAC Controller
 10   - Keguang Zhang <keguang.zhang@gmail.com>
 13   Loongson-1C Ethernet MAC Controller is based on
 17   - 10/100Mbps
 18   - Full-duplex operation (IEEE 802.3x flow control automatic transmission)
 19   - Half-duplex operation (CSMA/CD Protocol and back-pressure support)
 [all …]
 
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| H A D | qcom,ethqos.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause3 ---
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Bjorn Andersson <andersson@kernel.org>
 11   - Konrad Dybcio <konradybcio@kernel.org>
 18   - $ref: snps,dwmac.yaml#
 23       - items:
 24           - enum:
 25               - qcom,qcs615-ethqos
 26           - const: qcom,qcs404-ethqos
 [all …]
 
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| /linux/arch/loongarch/boot/dts/ | 
| H A D | loongson-2k2000-ref.dts | 1 // SPDX-License-Identifier: GPL-2.06 /dts-v1/;
 8 #include "loongson-2k2000.dtsi"
 11 	compatible = "loongson,ls2k2000-ref", "loongson,ls2k2000";
 12 	model = "Loongson-2K2000 Reference Board";
 19 		stdout-path = "serial0:115200n8";
 28 	reserved-memory {
 29 		#address-cells = <2>;
 30 		#size-cells = <2>;
 34 			compatible = "shared-dma-pool";
 [all …]
 
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| H A D | loongson-2k1000-ref.dts | 1 // SPDX-License-Identifier: GPL-2.06 /dts-v1/;
 8 #include "dt-bindings/thermal/thermal.h"
 9 #include "loongson-2k1000.dtsi"
 12 	compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000";
 13 	model = "Loongson-2K1000 Reference Board";
 20 		stdout-path = "serial0:115200n8";
 30 	reserved-memory {
 31 		#address-cells = <2>;
 32 		#size-cells = <2>;
 [all …]
 
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| /linux/arch/mips/boot/dts/loongson/ | 
| H A D | lsgz_1b_dev.dts | 1 // SPDX-License-Identifier: GPL-2.03  * Copyright (c) 2023-2025 Keguang Zhang <keguang.zhang@gmail.com>
 6 /dts-v1/;
 8 #include <dt-bindings/gpio/gpio.h>
 13 	compatible = "loongson,lsgz-1b-dev", "loongson,ls1b";
 31 		stdout-path = "serial0:115200n8";
 35 		compatible = "gpio-leds";
 40 			linux,default-trigger = "heartbeat";
 46 			linux,default-trigger = "nand-disk";
 50 	codec: audio-codec {
 [all …]
 
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| H A D | cq-t300b.dts | 1 // SPDX-License-Identifier: GPL-2.03  * Copyright (c) 2023-2025 Keguang Zhang <keguang.zhang@gmail.com>
 6 /dts-v1/;
 8 #include <dt-bindings/gpio/gpio.h>
 13 	compatible = "loongson,cq-t300b", "loongson,ls1c";
 14 	model = "CQ-T300B Board";
 30 		stdout-path = "serial0:115200n8";
 34 		compatible = "gpio-leds";
 39 			linux,default-trigger = "heartbeat";
 45 			linux,default-trigger = "nand-disk";
 [all …]
 
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| H A D | smartloong-1c.dts | 1 // SPDX-License-Identifier: GPL-2.03  * Copyright (c) 2023-2025 Keguang Zhang <keguang.zhang@gmail.com>
 6 /dts-v1/;
 8 #include <dt-bindings/gpio/gpio.h>
 13 	compatible = "loongmasses,smartloong-1c", "loongson,ls1c";
 14 	model = "Smartloong-1C Board";
 30 		stdout-path = "serial0:115200n8";
 34 		compatible = "gpio-leds";
 39 			linux,default-trigger = "heartbeat";
 45 			linux,default-trigger = "nand-disk";
 [all …]
 
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| H A D | loongson64-2k1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.03 /dts-v1/;
 5 #include <dt-bindings/interrupt-controller/irq.h>
 10 	#address-cells = <2>;
 11 	#size-cells = <2>;
 14 		#address-cells = <1>;
 15 		#size-cells = <0>;
 21 			#clock-cells = <1>;
 27 		#clock-cells = <0>;
 28 		compatible = "fixed-clock";
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| H A D | ls1b-demo.dts | 1 // SPDX-License-Identifier: GPL-2.03  * Copyright (c) 2023-2025 Keguang Zhang <keguang.zhang@gmail.com>
 6 /dts-v1/;
 8 #include <dt-bindings/gpio/gpio.h>
 13 	compatible = "loongson,ls1b-demo", "loongson,ls1b";
 14 	model = "LS1B-DEMO Board";
 30 		stdout-path = "serial0:38400n8";
 33 	codec: audio-codec {
 35 		#sound-dai-cells = <0>;
 39 		compatible = "simple-audio-card";
 [all …]
 
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| /linux/arch/riscv/boot/dts/sophgo/ | 
| H A D | cv180x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 #include <dt-bindings/clock/sophgo,cv1800.h>
 8 #include <dt-bindings/gpio/gpio.h>
 9 #include <dt-bindings/interrupt-controller/irq.h>
 10 #include "cv18xx-reset.h"
 13 	#address-cells = <1>;
 14 	#size-cells = <1>;
 17 		compatible = "fixed-clock";
 18 		clock-output-names = "osc_25m";
 19 		#clock-cells = <0>;
 [all …]
 
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| /linux/arch/arm/boot/dts/axis/ | 
| H A D | artpec6-devboard.dts | 1 // SPDX-License-Identifier: GPL-2.0-only2 // Axis ARTPEC-6 development board.
 4 /dts-v1/;
 8 	model = "ARTPEC-6 development board";
 9 	compatible = "axis,artpec6-dev-board", "axis,artpec6";
 19 		stdout-path = "serial3:115200n8";
 51 	phy-handle = <&phy1>;
 52 	phy-mode = "gmii";
 54 	mdio {
 55 		#address-cells = <0x1>;
 [all …]
 
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| /linux/arch/arm64/boot/dts/qcom/ | 
| H A D | qcs404-evb-4000.dts | 1 // SPDX-License-Identifier: GPL-2.06 /dts-v1/;
 8 #include <dt-bindings/gpio/gpio.h>
 9 #include "qcs404-evb.dtsi"
 13 	compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb",
 20 	snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
 21 	snps,reset-active-low;
 22 	snps,reset-delays-us = <0 10000 10000>;
 24 	pinctrl-names = "default";
 25 	pinctrl-0 = <ðernet_defaults>;
 [all …]
 
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| /linux/arch/arm64/boot/dts/amlogic/ | 
| H A D | meson-s4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/interrupt-controller/irq.h>
 7 #include <dt-bindings/interrupt-controller/arm-gic.h>
 8 #include <dt-bindings/gpio/gpio.h>
 9 #include <dt-bindings/gpio/meson-s4-gpio.h>
 10 #include <dt-bindings/clock/amlogic,s4-pll-clkc.h>
 11 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
 12 #include <dt-bindings/power/meson-s4-power.h>
 13 #include <dt-bindings/reset/amlogic,meson-s4-reset.h>
 17 		#address-cells = <2>;
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| /linux/arch/arm/boot/dts/intel/socfpga/ | 
| H A D | socfpga_arria10_mercury_aa1.dtsi | 1 // SPDX-License-Identifier: GPL-2.011 	compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga";
 25 		stdout-path = "serial1:115200n8";
 30 	phy-mode = "rgmii";
 31 	phy-addr = <0xffffffff>; /* probe for phy addr */
 33 	max-frame-size = <3800>;
 35 	phy-handle = <&phy3>;
 37 	mdio {
 38 		#address-cells = <1>;
 39 		#size-cells = <0>;
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| /linux/arch/riscv/boot/dts/starfive/ | 
| H A D | jh7110-pine64-star64.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT6 /dts-v1/;
 7 #include "jh7110-common.dtsi"
 18 	starfive,tx-use-rgmii-clk;
 19 	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
 20 	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
 25 	phy-handle = <&phy1>;
 26 	phy-mode = "rgmii-id";
 27 	starfive,tx-use-rgmii-clk;
 28 	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
 [all …]
 
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| /linux/arch/arm/boot/dts/st/ | 
| H A D | stm32mp157c-odyssey.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)6 /dts-v1/;
 8 #include "stm32mp157c-odyssey-som.dtsi"
 11 	model = "Seeed Studio Odyssey-STM32MP157C Board";
 12 	compatible = "seeed,stm32mp157c-odyssey",
 13 		     "seeed,stm32mp157c-odyssey-som", "st,stm32mp157";
 21 		stdout-path = "serial0:115200n8";
 26 	pinctrl-names = "default", "sleep";
 27 	pinctrl-0 = <&dcmi_pins_b>;
 28 	pinctrl-1 = <&dcmi_sleep_pins_b>;
 [all …]
 
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| /linux/arch/arm64/boot/dts/freescale/ | 
| H A D | imx93-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)7 /dts-v1/;
 12 	model = "Variscite VAR-SOM-MX93 module";
 13 	compatible = "variscite,var-som-mx93", "fsl,imx93";
 15 	mmc_pwrseq: mmc-pwrseq {
 16 		compatible = "mmc-pwrseq-simple";
 17 		post-power-on-delay-ms = <100>;
 18 		power-off-delay-us = <10000>;
 19 		reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>,	/* WIFI_RESET */
 25 	pinctrl-names = "default";
 [all …]
 
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| /linux/arch/arm64/boot/dts/toshiba/ | 
| H A D | tmpv7708-visrobo-vrb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)9 /dts-v1/;
 11 #include "tmpv7708-visrobo-vrc.dtsi"
 15 	compatible = "toshiba,tmpv7708-visrobo-vrb", "toshiba,tmpv7708";
 23 		stdout-path = "serial0:115200n8";
 43 	phy-handle = <&phy0>;
 44 	phy-mode = "rgmii-id";
 47 		#address-cells = <1>;
 48 		#size-cells = <0>;
 49 		compatible = "snps,dwmac-mdio";
 [all …]
 
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| H A D | tmpv7708-rm-mbrc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)9 /dts-v1/;
 15 	compatible = "toshiba,tmpv7708-rm-mbrc", "toshiba,tmpv7708";
 23 		stdout-path = "serial0:115200n8";
 43 	phy-handle = <&phy0>;
 44 	phy-mode = "rgmii-id";
 47 		#address-cells = <1>;
 48 		#size-cells = <0>;
 49 		compatible = "snps,dwmac-mdio";
 50 		phy0: ethernet-phy@1 {
 [all …]
 
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