| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | stm32-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: STMicroelectronics STM32 / MCU DWMAC glue layer controller 11 - Alexandre Torgue <alexandre.torgue@foss.st.com> 12 - Christophe Roullier <christophe.roullier@foss.st.com> 17 # We need a select here so we don't match all nodes with 'snps,dwmac' 23 - st,stm32-dwmac 24 - st,stm32mp1-dwmac [all …]
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| H A D | amlogic,meson-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Amlogic Meson DWMAC Ethernet controller 11 - Neil Armstrong <neil.armstrong@linaro.org> 12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 14 # We need a select here so we don't match all nodes with 'snps,dwmac' 20 - amlogic,meson6-dwmac 21 - amlogic,meson8b-dwmac [all …]
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| H A D | starfive,jh7110-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: StarFive JH7110 DWMAC glue layer 11 - Emil Renner Berthing <kernel@esmil.dk> 12 - Samin Guo <samin.guo@starfivetech.com> 19 - starfive,jh7100-dwmac 20 - starfive,jh7110-dwmac 22 - compatible [all …]
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| H A D | nxp,dwmac-imx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8/9 DWMAC glue layer 10 - Clark Wang <xiaoning.wang@nxp.com> 11 - Shawn Guo <shawnguo@kernel.org> 12 - NXP Linux Team <linux-imx@nxp.com> 14 # We need a select here so we don't match all nodes with 'snps,dwmac' 20 - nxp,imx8mp-dwmac-eqos [all …]
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| H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.40a 25 - snps,dwmac-3.50a [all …]
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| H A D | intel,dwmac-plat.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intel DWMAC glue layer 10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> 17 - intel,keembay-dwmac 19 - compatible 22 - $ref: snps,dwmac.yaml# 27 - items: [all …]
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| H A D | mediatek-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek-dwma [all...] |
| H A D | qcom,ethqos.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bhupesh Sharma <bhupesh.sharma@linaro.org> 17 - $ref: snps,dwmac.yaml# 22 - qcom,qcs404-ethqos 23 - qcom,sa8775p-ethqos 24 - qcom,sc8280xp-ethqos 25 - qcom,sm8150-ethqos 30 reg-names: [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/st/ |
| H A D | stm32mp253.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 11 compatible = "arm,cortex-a35"; 14 enable-method = "psci"; 15 power-domains = <&CPU_PD1>; 16 power-domain-names = "psci"; 20 arm-pmu { 23 interrupt-affinity = <&cpu0>, <&cpu1>; 27 CPU_PD1: power-domain-cpu1 { 28 #power-domain-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/intel/ |
| H A D | socfpga_agilex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/agilex-clock.h> 13 compatible = "intel,socfpga-agilex"; 14 #address-cells = <2>; 15 #size-cells = <2>; 17 reserved-memory { [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/altera/ |
| H A D | socfpga_stratix10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/stratix10-clock.h> 12 compatible = "altr,socfpga-stratix10"; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 reserved-memory { 17 #address-cells = <2>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | stm32mp133.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 14 reg-names = "m_can", "message_ram"; 17 interrupt-names = "int0", "int1"; 19 clock-names = "hclk", "cclk"; 20 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; 27 reg-names = "m_can", "message_ram"; 30 interrupt-names = "int0", "int1"; 32 clock-names = "hclk", "cclk"; 33 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; [all …]
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| H A D | stih418-b2199.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 11 compatible = "st,stih418-b2199", "st,stih418"; 14 stdout-path = &sbc_serial0; 28 compatible = "gpio-leds"; 29 led-red { 32 linux,default-trigger = "heartbeat"; 34 led-green { 35 gpios = <&pio1 3 GPIO_ACTIVE_HIGH>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/amlogic/ |
| H A D | meson-s4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/meson-s4-gpio.h> 10 #include <dt-bindings/clock/amlogic,s4-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h> 12 #include <dt-bindings/power/meson-s4-power.h> 13 #include <dt-bindings/reset/amlogic,meson-s4-reset.h> 17 #address-cells = <2>; [all …]
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| H A D | amlogic-c3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/reset/amlogic,c3-reset.h> 10 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> 12 #include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> 13 #include <dt-bindings/power/amlogic,c3-pwrc.h> 14 #include <dt-bindings/gpio/amlogic-c3-gpio.h> [all …]
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| /freebsd/sys/contrib/device-tree/src/arc/ |
| H A D | abilis_tb10x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 12 compatible = "abilis,arc-tb10x"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 28 compatible = "snps,arc-timer"; 29 interrupts = <3>; 30 interrupt-parent = <&intc>; 36 compatible = "snps,arc-timer"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/axis/ |
| H A D | artpec6-devboard.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // Axis ARTPEC-6 development board. 4 /dts-v1/; 8 model = "ARTPEC-6 development board"; 9 compatible = "axis,artpec6-dev-board", "axis,artpec6"; 19 stdout-path = "serial3:115200n8"; 51 phy-handle = <&phy1>; 52 phy-mode = "gmii"; 55 #address-cells = <0x1>; 56 #size-cells = <0x0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/mips/loongson/ |
| H A D | loongson64-2k1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 21 #clock-cells = <1>; 27 #clock-cells = <0>; 28 compatible = "fixed-clock"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/ |
| H A D | socfpga_arria10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/reset/altr,rst-mgr-a10.h> 10 #address-cell [all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sa8775p-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include "sa8775p-ride.dtsi" 12 compatible = "qcom,sa8775p-ride", "qcom,sa8775p"; 16 phy-mode = "sgmii"; 20 phy-mode = "sgmii"; 24 compatible = "snps,dwmac-mdio"; 25 #address-cells = <1>; 26 #size-cells = <0>; 29 compatible = "ethernet-phy-id0141.0dd4"; [all …]
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| H A D | sa8775p-ride-r3.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include "sa8775p-ride.dtsi" 12 compatible = "qcom,sa8775p-ride-r3", "qcom,sa8775p"; 16 phy-mode = "2500base-x"; 20 phy-mode = "2500base-x"; 24 compatible = "snps,dwmac-mdio"; 25 #address-cells = <1>; 26 #size-cells = <0>; 29 compatible = "ethernet-phy-id31c3.1c33"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3568.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; 16 clock-names = "sata", "pmalive", "rxoob"; 19 phy-names = "sata-phy"; 20 ports-implemented = <0x1>; 21 power-domains = <&power RK3568_PD_PIPE>; 26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; 31 compatible = "rockchip,rk3568-qos", "syscon"; 36 compatible = "rockchip,rk3568-qos", "syscon"; 41 compatible = "rockchip,rk3568-qos", "syscon"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/ |
| H A D | lpc18xx.dtsi | 9 * Released under the terms of 3-clause BSD License 14 #include "../../armv7-m.dtsi" 16 #include "dt-bindings/clock/lpc18xx-cgu.h" 17 #include "dt-bindings/clock/lpc18xx-ccu.h" 23 #address-cells = <1>; 24 #size-cells = <1>; 27 #address-cell [all...] |
| /freebsd/sys/contrib/device-tree/src/arm/nuvoton/ |
| H A D | nuvoton-npcm750.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include "nuvoton-common-npcm7xx.dtsi" 8 #address-cells = <1>; 9 #size-cells = <1>; 10 interrupt-parent = <&gic>; 13 #address-cells = <1>; 14 #size-cells = <0>; 15 enable-method = "nuvoton,npcm750-smp"; 19 compatible = "arm,cortex-a9"; 21 clock-names = "clk_cpu"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/amlogic/ |
| H A D | meson.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/sound/meson-aiu.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 15 iio-hwmon { 16 compatible = "iio-hwmon"; 17 io-channels = <&saradc 8>; [all …]
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