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/linux/Documentation/devicetree/bindings/reset/
H A Dsnps,dw-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/snps,dw-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare Reset controller
10 - Philipp Zabel <p.zabel@pengutronix.de>
15 - snps,dw-high-reset
16 - snps,dw-low-reset
21 '#reset-cells':
24 reset-controller: true
[all …]
/linux/drivers/scsi/esas2r/
H A Desas2r_init.c5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
50 mem_desc->esas2r_param = mem_desc->size + align; in esas2r_initmem_alloc()
51 mem_desc->virt_addr = NULL; in esas2r_initmem_alloc()
52 mem_desc->phys_addr = 0; in esas2r_initmem_alloc()
53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev, in esas2r_initmem_alloc()
54 (size_t)mem_desc-> in esas2r_initmem_alloc()
56 (dma_addr_t *)&mem_desc-> in esas2r_initmem_alloc()
60 if (mem_desc->esas2r_data == NULL) { in esas2r_initmem_alloc()
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7870-a2corelte.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 chassis-type = "handset";
30 #address-cells = <2>;
31 #size-cells = <1>;
34 stdout-path = &serial2;
37 compatible = "simple-framebuffer";
[all …]
H A Dexynos7870-on7xelte.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 chassis-type = "handset";
30 #address-cells = <2>;
31 #size-cells = <1>;
34 stdout-path = &serial2;
37 compatible = "simple-framebuffer";
[all …]
H A Dexynos7870-j6lte.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 chassis-type = "handset";
30 #address-cells = <2>;
31 #size-cells = <1>;
34 stdout-path = &serial2;
37 compatible = "simple-framebuffer";
[all …]
/linux/Documentation/devicetree/bindings/bus/
H A Dbaikal,bt1-axi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 AXI-bus
11 - Serge Semin <fancer.lancer@gmail.com>
14 AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all
15 high-speed peripheral IP-cores with RAM controller and with MIPS P5600
16 cores. Traffic arbitration is done by means of DW AXI Interconnect (so
22 (Errors Handler Block) embedded on top of the DW AXI Interconnect and
[all …]
/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2500pci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
36 * Default offset is required for RSSI <-> dBm conversion.
70 * SOFT_RESET: Software reset, 1: reset, 0: normal.
71 * BBP_RESET: Hardware reset, 1: reset, 0, release.
218 * KICK_DECRYPT: Kick decryption engine, self-clear.
228 * CSR11: Back-off control register.
229 * CWMIN: CWmin. Default cwmin is 31 (2^5 - 1).
230 * CWMAX: CWmax. Default cwmax is 1023 (2^10 - 1).
267 * TSF_SYNC: Tsf sync, 0: disable, 1: infra, 2: ad-hoc/master mode.
[all …]
/linux/drivers/reset/
H A Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Simple Reset Controller Driver
7 * Based on Allwinner SoCs Reset Controller driver
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include <linux/reset-controller.h>
21 #include <linux/reset/reset-simple.h>
40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
43 if (assert ^ data->active_low) in reset_simple_update()
47 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update()
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
H A Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
H A Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
H A Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
28 * pin (active high) of the S2MPS11 PMIC, which acts
[all …]
H A Dexynos4412-p4note.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * Based on exynos4412-midas.dtsi.
10 /dts-v1/;
12 #include "exynos4412-ppmu-common.dtsi"
14 #include <dt-bindings/clock/maxim,max77686.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/power/summit,smb347-charger.h>
19 #include "exynos-pinctrl.h"
[all …]
/linux/sound/soc/intel/catpt/
H A Ddsp.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
19 return param == chan->device->dev; in catpt_dma_filter()
39 chan = dma_request_channel(mask, catpt_dma_filter, cdev->dev); in catpt_dma_request_config_chan()
41 dev_err(cdev->dev, "request channel failed\n"); in catpt_dma_request_config_chan()
42 return ERR_PTR(-ENODEV); in catpt_dma_request_config_chan()
54 dev_err(cdev->dev, "slave config failed: %d\n", ret); in catpt_dma_request_config_chan()
73 dev_err(cdev->dev, "prep dma memcpy failed\n"); in catpt_dma_memcpy()
74 return -EIO; in catpt_dma_memcpy()
79 CATPT_HMDC_HDDA(CATPT_DMA_DEVID, chan->chan_id), in catpt_dma_memcpy()
[all …]
/linux/drivers/scsi/
H A Dncr53c8xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 ** Device driver for the PCI-SCSI NCR538XX controller family.
6 ** Copyright (C) 1998-2001 Gerard Roudier <groudier@free.fr>
9 **-----------------------------------------------------------------------------
23 ** Stefan Esser <se@mi.Uni-Koeln.de>
62 /* ---------------------------------------------------------------------
65 ** ---------------------------------------------------------------------
143 * Disallow disconnections at boot-up
179 * Settle time after reset at boot-up
184 ** Bridge quirks work-around option defaulted to 1.
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
[all …]
H A Dmeson-gxbb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
[all …]
/linux/Documentation/scsi/
H A DBusLogic.rst1 .. SPDX-License-Identifier: GPL-2.0
21 Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com>
27 BusLogic, Inc. designed and manufactured a variety of high performance SCSI
50 be depended upon for high performance mission critical applications. All of
57 BT-948/958/958D, will always be available from my Linux Home Page at URL
69 the BT-948 PCI Ultra SCSI Host Adapter, and then again for the BT-958 PCI Wide
72 readily achieve, and the Linux community has available high performance host
90 94555, USA and can be reached at 510/796-6100 or on the World Wide Web at
92 mail at techsup@mylex.com, by Voice at 510/608-2400, or by FAX at 510/745-7715.
101 -----------------------------------
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Dcn9130-cf-pro.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9130-sr-som.dtsi"
16 #include "cn9130-cf.dtsi"
20 compatible = "solidrun,cn9130-clearfog-pro",
21 "solidrun,cn9130-sr-som", "marvell,cn9130";
23 gpio-keys {
[all …]
/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
21 #include <linux/dma-mapping.h>
24 #include <media/cec-notifier.h>
26 #include <linux/media-bus-format.h>
40 #include "dw-hdmi-audio.h"
41 #include "dw-hdmi-cec.h"
42 #include "dw-hdmi.h"
[all …]
/linux/drivers/i2c/busses/
H A Di2c-designware-core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
85 #define DW_IC_COMP_TYPE_VALUE 0x44570140 /* "DW" + 0x0140 */
192 * struct dw_i2c_dev - private i2c-designware data
201 * @rst: optional reset for the controller
225 * @rx_outstanding: current master-rx elements in tx fifo
234 * @hs_hcnt: high speed HCNT value
235 * @hs_lcnt: high speed LCNT value
239 * -1 if there is no semaphore.
243 * @mode: operation mode - DW_IC_MASTER or DW_IC_SLAVE
248 * to generate the high period and low period of SCL line.
[all …]

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