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/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8997.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 motor driver, flash LED driver and Micro-USB Interface Controller.
22 const: maxim,max8997-pmic
24 charger-supply:
30 - description: irq1 interrupt
31 - description: alert interrupt
33 max8997,pmic-buck1-dvs-voltage:
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H A Dlp872x.txt4 - compatible: "ti,lp8720" or "ti,lp8725"
5 - reg: I2C slave address. 0x7d = LP8720, 0x7a = LP8725
8 - ti,general-config: the value of LP872X_GENERAL_CFG register (u8)
10 bit[2]: BUCK output voltage control by external DVS pin or register
12 bit[1]: sleep control by external DVS pin or register
20 bit[2]: BUCK1 output voltage control by external DVS pin or register
21 1 = register 08h, 0 = DVS
27 - ti,update-config: define it when LP872X_GENERAL_CFG register should be set
28 - ti,dvs-gpio: GPIO specifier for external DVS pin control of LP872x devices.
29 - ti,dvs-vsel: DVS selector. 0 = SEL_V1, 1 = SEL_V2.
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H A Dmaxim,max8952.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
19 max8952,default-mode:
23 index of default DVS voltage
25 max8952,dvs-mode-microvolt:
32 Array of 4 integer values defining DVS voltages in microvolts. All values
35 max8952,en-gpio:
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H A Dmaxim,max8973.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
18 - maxim,max8973
19 - maxim,max77621
21 junction-warn-millicelsius:
30 maxim,dvs-gpio:
33 GPIO which is connected to DVS pin of device.
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H A Dnxp,pca9450-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/nxp,pca9450-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robin Gong <yibin.gong@nxp.com>
18 https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf
28 - nxp,pca9450a
29 - nxp,pca9450b
30 - nxp,pca9450c
31 - nxp,pca9451a
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H A Drohm,bd71815-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
33 regulator-name:
37 "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$":
44 regulator-name:
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/linux/Documentation/devicetree/bindings/mfd/
H A Dmaxim,max8998.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 sub-blocks. It is interfaced using an I2C interface. Each sub-block is
21 - maxim,max8998
22 - national,lp3974
23 - ti,lp3974
31 - description: Main interrupt
32 - description: Power-on/-off interrupt
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/linux/include/linux/regulator/
H A Dlp872x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <linux/gpio/consumer.h>
50 * @gpio : gpio descriptor for dvs control
51 * @vsel : dvs selector for buck v1 or buck v2 register
52 * @init_state : initial dvs pin state
55 struct gpio_desc *gpio; member
75 * @dvs : dvs data for buck voltage control
76 * @enable_gpio : gpio descriptor for enable control
82 struct lp872x_dvs *dvs; member
/linux/drivers/regulator/
H A Dlp872x.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/gpio/consumer.h>
88 /* Default DVS Mode */
92 /* dump registers in regmap-debugfs */
160 ret = regmap_read(lp->regmap, addr, &val); in lp872x_read_byte()
162 dev_err(lp->dev, "failed to read 0x%.2x\n", addr); in lp872x_read_byte()
172 return regmap_write(lp->regmap, addr, data); in lp872x_write_byte()
178 return regmap_update_bits(lp->regmap, addr, mask, data); in lp872x_update_bits()
183 enum lp872x_id chip = lp->chipid; in lp872x_get_timestep_usec()
203 return -EINVAL; in lp872x_get_timestep_usec()
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H A Ds5m8767.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/gpio/consumer.h>
171 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); in s5m8767_get_register()
174 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); in s5m8767_get_register()
180 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; in s5m8767_get_register()
186 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; in s5m8767_get_register()
189 return -EINVAL; in s5m8767_get_register()
192 for (i = 0; i < s5m8767->num_regulators; i++) { in s5m8767_get_register()
193 if (s5m8767->opmode[i].id == reg_id) { in s5m8767_get_register()
194 mode = s5m8767->opmode[i].mode; in s5m8767_get_register()
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H A Dmax8952.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * max8952.c - Voltage and current regulation for the Maxim 8952
16 #include <linux/gpio/consumer.h>
46 int ret = i2c_smbus_read_byte_data(max8952->client, reg); in max8952_read_reg()
57 return i2c_smbus_write_byte_data(max8952->client, reg, value); in max8952_write_reg()
66 return -EINVAL; in max8952_list_voltage()
68 return (max8952->pdata->dvs_mode[selector] * 10 + 770) * 1000; in max8952_list_voltage()
76 if (max8952->vid0) in max8952_get_voltage_sel()
78 if (max8952->vid1) in max8952_get_voltage_sel()
89 if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) { in max8952_set_voltage_sel()
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H A Dmax8997-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // max8997.c - Regulator driver for the Maxim 8997/8966
13 #include <linux/gpio/consumer.h>
20 #include <linux/mfd/max8997-private.h>
51 int set3 = (max8997->buck125_gpioindex) & 0x1; in max8997_set_gpio()
52 int set2 = ((max8997->buck125_gpioindex) >> 1) & 0x1; in max8997_set_gpio()
53 int set1 = ((max8997->buck125_gpioindex) >> 2) & 0x1; in max8997_set_gpio()
55 gpiod_set_value(max8997->buck125_gpiods[0], set1); in max8997_set_gpio()
56 gpiod_set_value(max8997->buck125_gpiods[1], set2); in max8997_set_gpio()
57 gpiod_set_value(max8997->buck125_gpiods[2], set3); in max8997_set_gpio()
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H A Dpca9450-regulator.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/gpio/consumer.h>
29 const struct pc9450_dvs_config dvs; member
55 .max_register = PCA9450_MAX_REGISTER - 1,
61 * BUCK1RAM[1:0] BUCK1 DVS ramp rate setting
168 if (ret == -EINVAL) in buck_set_dvs()
173 for (i = 0; i < desc->n_voltages; i++) { in buck_set_dvs()
178 i <<= ffs(desc->vsel_mask) - 1; in buck_set_dvs()
188 /* Enable DVS control through PMIC_STBY_REQ for this BUCK */ in buck_set_dvs()
189 ret = regmap_update_bits(regmap, regulator->desc.enable_reg, in buck_set_dvs()
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos4210-trats.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
37 stdout-path = "serial2:115200n8";
40 vemmc_reg: regulator-0 {
41 compatible = "regulator-fixed";
42 regulator-name = "VMEM_VDD_2.8V";
43 regulator-min-microvolt = <2800000>;
44 regulator-max-microvolt = <2800000>;
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H A Ds5pv210-aquila.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
35 pmic_ap_clk: clock-0 {
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <32768>;
42 vtf_reg: regulator-0 {
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H A Ds5pv210-goni.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/input/input.h>
38 pmic_ap_clk: clock-0 {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <32768>;
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H A Dexynos4210-universal_c210.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
39 fixed-rate-clocks {
41 compatible = "samsung,clock-xxti";
42 clock-frequency = <0>;
46 compatible = "samsung,clock-xusbxti";
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H A Dexynos4210-i9100.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree
11 /dts-v1/;
13 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
19 model = "Samsung Galaxy S2 (GT-I9100)";
21 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
38 vemmc_reg: regulator-0 {
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H A Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
[all …]
H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-phanbell.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
[all …]
H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
17 gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron-jaq.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "rk3288-veyron-chromebook.dtsi"
11 #include "../cros-ec-sbs.dtsi"
15 compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
16 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
17 "google,veyron-jaq-rev1", "google,veyron-jaq",
22 /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */
23 brightness-levels = <8 255>;
24 num-interpolated-steps = <247>;
[all …]
H A Drk3288-veyron-speedy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
11 #include "../cros-ec-sbs.dtsi"
15 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
16 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
17 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
18 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
19 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-max77620.txt3 Device has 8 GPIO pins which can be configured as GPIO as well as the
6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
11 --------------------------
14 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
15 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
16 <pinctrl-bindings.txt>.
19 sub-node have following properties:
22 ------------------
23 - pins: List of pins. Valid values of pins properties are:
27 -------------------
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