| /linux/Documentation/driver-api/cxl/linux/ |
| H A D | early-boot.rst | 9 During early boot, Linux sets up immutable resources (such as numa nodes), while
14 During Linux Early Boot stage (functions in the kernel that have the __init
23 There are 4 pre-boot options that need to be considered during kernel build
24 which dictate how memory will be managed by Linux during early boot.
89 during :code:`mm_init`. The CEDT and SRAT must contain sufficient :code:`PXM`
100 During :code:`__init`, Linux initializes the system with a default memory tier that
104 default. :code:`memory_tier_late_init` is called during late-init for nodes setup
105 during driver configuration.
125 regions on NUMA nodes during early boot. However, CMA cannot reserve memory
126 on NUMA nodes that are not online during early boot. ::
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| /linux/drivers/net/wireless/ti/wl12xx/ |
| H A D | conf.h | 110 * during BT voice/ACL link.
118 * during BT voice
126 * during BT A2DP
134 * during BT A2DP BR
142 * during BT A2DP EDR
150 * during BT voice
191 * RX guard time before the beginning of a new BT voice frame during
199 * TX guard time before the beginning of a new BT voice frame during
225 * The used WLAN legacy service period during active BT ACL link
232 * The used WLAN UPSD service period during active BT ACL link
|
| /linux/Documentation/driver-api/firmware/ |
| H A D | firmware_cache.rst | 6 re-initialize devices. During resume there may be a period of time during which
7 firmware lookups are not possible, during this short period of time firmware
14 The firmware cache makes using certain firmware API calls safe during a device
16 the firmware by themselves for dealing with firmware loss during system resume.
44 as the firmware cache is set up during suspend, the timeout is set back to
|
| /linux/sound/soc/sof/xtensa/ |
| H A D | core.c | 30 "Processor internal physical address or data error during instruction fetch"},
32 "Processor internal physical address or data error during load or store"},
43 "PIF data error during instruction fetch"},
45 "Synchronous PIF data error during LoadStore access"},
47 "PIF address error during instruction fetch"},
49 "Synchronous PIF address error during LoadStore access"},
50 {16, "InstTLBMissCause", "Error during Instruction TLB refill"},
58 "Error during TLB refill for a load or store"},
|
| /linux/Documentation/ABI/stable/ |
| H A D | sysfs-bus-firewire | 7 Read-only. Mutable during the node device's lifetime.
26 Read-only. Mutable during the node device's lifetime.
60 Read-only. Immutable during the unit device's lifetime.
78 Read-only. Mutable during the node device's lifetime.
79 Immutable during the unit device's lifetime.
126 Read-only attribute, immutable during the target's lifetime.
|
| /linux/drivers/net/ethernet/sun/ |
| H A D | sunhme.h | 54 #define GREG_STAT_RXERR 0x00040000 /* Error during receive dma */
55 #define GREG_STAT_RXLATERR 0x00080000 /* Late error during receive dma */
56 #define GREG_STAT_RXPERR 0x00100000 /* Parity error during receive dma */
57 #define GREG_STAT_RXTERR 0x00200000 /* Tag error during receive dma */
62 #define GREG_STAT_TXEACK 0x04000000 /* Error during transmit dma */
63 #define GREG_STAT_TXLERR 0x08000000 /* Late error during transmit dma */
64 #define GREG_STAT_TXPERR 0x10000000 /* Parity error during transmit dma */
65 #define GREG_STAT_TXTERR 0x20000000 /* Tag error during transmit dma */
91 #define GREG_IMASK_RXERR 0x00040000 /* Error during receive dma */
92 #define GREG_IMASK_RXLATERR 0x00080000 /* Late error during receive dma */
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|
| /linux/drivers/scsi/qedf/ |
| H A D | qedf_hsi.h | 332 FCOE_TASK_TX_STATE_ABTS /* Updated by TX path during abort procedure */,
333 /* Updated by TX path during exchange cleanup procedure */
336 * Updated by TX path during exchange cleanup continuation task
340 /* Updated by TX path during exchange cleanup first xfer procedure */
342 /* Updated by TX path during exchange cleanup read task in Target */
344 /* Updated by TX path during target exchange cleanup procedure */
346 /* Updated by TX path during sequence recovery procedure */
|
| /linux/drivers/acpi/acpica/ |
| H A D | dswload.c | 98 * DESCRIPTION: Descending callback used during the loading of ACPI tables.
218 * Allow scope change to root during execution of module-level in acpi_ds_load1_begin_op()
219 * code. Root is typed METHOD during this time. in acpi_ds_load1_begin_op()
271 * during the load phase, only during execution. in acpi_ds_load1_begin_op()
391 * DESCRIPTION: Ascending callback used during the loading of the namespace,
422 * This earlier creation during disassembly solves this issue by inserting in acpi_ds_load1_end_op()
445 * during the load phase, only during execution. in acpi_ds_load1_end_op()
460 * during the load phase, only during execution. in acpi_ds_load1_end_op()
539 * during the load phase, only during execution. in acpi_ds_load1_end_op()
|
| /linux/Documentation/power/ |
| H A D | suspend-and-interrupts.rst | 12 Device interrupt request lines (IRQs) are generally disabled during system
29 Device IRQs are re-enabled during system resume, right before the "early" phase
37 There are interrupts that can legitimately trigger during the entire system
39 devices as well as during the time when nonboot CPUs are taken offline and
46 expected during the suspend-resume cycle, but does not guarantee that the
67 during system sleep so as to trigger a system wakeup when needed. For example,
83 re-enabled by resume_device_irqs() during the subsequent system resume. Also
|
| H A D | swsusp.rst | 74 1) During lateinit: If resume=/dev/your_swap_partition is specified on
159 * require half of memory to be free during suspend. That way you can
164 during suspending, but otherwise it would work...
196 kernel threads are controlled during hibernation or system-wide suspend (on
218 Do selective suspend during runtime power management, that's okay. But
270 What happens to devices during swsusp? They seem to be resumed
271 during system suspend?
338 During suspend a temporary key is created and this key is used to
339 encrypt the data written to disk. When, during resume, the data was
341 means that all data written to disk during suspend are then
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| /linux/Documentation/devicetree/bindings/input/ |
| H A D | iqs626a.yaml | 42 Specifies the power mode during suspend as follows:
64 updated during ultra-low-power mode as follows:
130 description: Specifies the report rate (in ms) during normal-power mode.
136 description: Specifies the report rate (in ms) during low-power mode.
143 description: Specifies the report rate (in ms) during ultra-low-power mode.
181 manually triggered during initialization.
268 Specifies the bias current applied during projected-capacitance
306 Specifies the raw count filter strength during normal-power mode (ULP
314 Specifies the raw count filter strength during low-power mode (ULP and
322 Specifies the long-term average filter strength during normal-power
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| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | rs485.yaml | 49 rs485-rx-during-tx:
57 rs485-rx-during-tx-gpios:
58 description: Output GPIO pin that sets the state of rs485-rx-during-tx. This
60 the active state enables RX during TX.
|
| /linux/net/ipv4/ |
| H A D | tcp_vegas.c | 19 * only every-other RTT during slow start, we increase during
20 * every RTT during slow start, just like Reno.
21 * o Largely to allow continuous cwnd growth during slow start,
27 * minimum RTT sample observed during the last RTT to calculate
68 * Instead we must wait until the completion of an RTT during
126 /* Find the min RTT during the last RTT to find in tcp_vegas_pkts_acked()
207 * calculations. This is the min RTT seen during the in tcp_vegas_cong_avoid()
|
| /linux/drivers/net/ethernet/apple/ |
| H A D | bmac.h | 69 # define RxDMAError 0x00040000 /* Error during receive DMA */
71 # define RxParityErr 0x00100000 /* Parity error during receive DMA */
72 # define RxTagError 0x00200000 /* Tag error during receive DMA */
77 # define TxDMAError 0x04000000 /* Error during transmit DMA */
78 # define TxDMALateError 0x08000000 /* Late error during transmit DMA */
79 # define TxParityError 0x10000000 /* Parity error during transmit DMA */
80 # define TxTagError 0x20000000 /* Tag error during transmit DMA */
|
| /linux/include/linux/phy/ |
| H A D | phy-mipi-dphy.h | 64 * Time interval, in picoseconds, during which the HS receiver
148 * Time interval, in picoseconds, during which the HS receiver
160 * Time interval, in picoseconds, during which the HS-RX
214 * Bridge state (LP-00) after accepting control during a Link
225 * Bridge state (LP-00) before releasing control during a Link
237 * (LP-00) during a Link Turnaround.
|
| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | maxim,max77802.yaml | 30 support changing their mode to Low Power Mode during suspend. These
44 mode during normal operation.
53 Mode during suspend).
65 Mode during suspend).
|
| /linux/Documentation/admin-guide/device-mapper/ |
| H A D | dm-flakey.rst | 39 If no feature parameters are present, during the periods of
55 During <down interval>, replace <Nth_byte> of the data of
71 During <down interval>, replace random byte in a read bio
76 During <down interval>, replace random byte in a write bio
|
| /linux/Documentation/admin-guide/thermal/ |
| H A D | intel_powerclamp.rst | 94 kidle_inject/cpu. During idle injection, it runs monitor/mwait idle
98 The NOHZ schedule tick is disabled during idle time, but interrupts
144 During scalability testing, it is observed that synchronized actions
164 When an excessive amount of wakeups occurs during idle, an
206 Calibration occurs during runtime. No offline method is available.
210 collected during a period without extra interrupts is considered
213 To compensate for excessive amounts of wakeup during idle, additional
237 percent. As mentioned earlier, since interrupts are allowed during
248 with the changes. During this time, idle injection is out of sync,
|
| /linux/tools/power/x86/turbostat/ |
| H A D | turbostat.8 | 52 'delta' shows the difference in values during the measurement interval.
73 'delta' shows the difference in values during the measurement interval.
140 \fBusec\fP For each CPU, the number of microseconds elapsed during counter collection, including th…
156 \fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
158 \fBIRQ\fP The number of interrupts serviced by that CPU during the measurement interval. The syste…
160 \fBSMI\fP The number of System Management Interrupts serviced CPU during the measurement interval.…
162 \fBC1, C2, C3...\fP The number times Linux requested the C1, C2, C3 idle state during the measureme…
164 …cs. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement in…
166 …cs. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement in…
176 \fBCoreThr\fP Core Thermal Throttling events during the measurement interval. Note that events sin…
[all …]
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| /linux/drivers/firewire/ |
| H A D | Kconfig | 29 KUnit tests run during boot and output the results to the debug
45 KUnit tests run during boot and output the results to the debug
61 KUnit tests run during boot and output the results to the debug
76 KUnit tests run during boot and output the results to the debug
103 KUnit tests run during boot and output the results to the debug
|
| /linux/drivers/base/power/ |
| H A D | common.c | 93 * This function should typically be invoked from subsystem level code during
132 * This function should typically be invoked by a driver during the probe phase,
145 * dev_pm_domain_detach() on it, typically during the remove phase.
191 * dev_pm_domain_detach_list(), typically during the remove phase.
307 * it will be invoked during the remove phase from drivers implicitly if driver
324 * you during remove phase.
354 * detaches @dev from its PM domain. Typically it should be invoked during the
372 * Typically it should be invoked during the remove phase from drivers.
400 * This function should typically be called during probe by a subsystem/driver,
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-kernel-mm-numa | 9 Description: Enable/disable demoting pages during reclaim
11 Page migration during reclaim is intended for systems
16 Allowing page migration during reclaim enables these
|
| /linux/tools/perf/pmu-events/arch/x86/broadwell/ |
| H A D | pipeline.json | 382 "PublicDescription": "This event counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. This event is clocked by base clock (100 Mhz) on Sandy Bridge. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
582 "PublicDescription": "This event counts the number of instructions retired from execution. For instructions that consist of multiple micro-ops, this event counts the retirement of the last micro-op of the instruction. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. INST_RETIRED.ANY_P is counted by a programmable counter and it is an architectural performance event. Counting: Faulting executions of GETSEC/VM entry/VM Exit/MWait will not count as retired instructions.",
620 "PublicDescription": "This event counts the number of cycles during which Resource Allocation Table (RAT) external stall is sent to Instruction Decode Queue (IDQ) for the current thread. This also includes the cycles during which the Allocator is serving another thread.",
825 "PublicDescription": "This event counts cycles during which the reservation station (RS) is empty for the thread. Note: In ST-mode, not active thread should drive 0. This is usually caused by severely costly branch mispredictions, or allocator/FE issues.",
845 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 0.",
854 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 1.",
863 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 2.",
872 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 3.",
881 "PublicDescription": "This event counts, on the per-thread basis, cycles during whic
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/broadwellde/ |
| H A D | pipeline.json | 382 "PublicDescription": "This event counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. This event is clocked by base clock (100 Mhz) on Sandy Bridge. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
582 "PublicDescription": "This event counts the number of instructions retired from execution. For instructions that consist of multiple micro-ops, this event counts the retirement of the last micro-op of the instruction. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. INST_RETIRED.ANY_P is counted by a programmable counter and it is an architectural performance event. Counting: Faulting executions of GETSEC/VM entry/VM Exit/MWait will not count as retired instructions.",
620 "PublicDescription": "This event counts the number of cycles during which Resource Allocation Table (RAT) external stall is sent to Instruction Decode Queue (IDQ) for the current thread. This also includes the cycles during which the Allocator is serving another thread.",
825 "PublicDescription": "This event counts cycles during which the reservation station (RS) is empty for the thread. Note: In ST-mode, not active thread should drive 0. This is usually caused by severely costly branch mispredictions, or allocator/FE issues.",
845 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 0.",
854 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 1.",
863 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 2.",
872 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 3.",
881 "PublicDescription": "This event counts, on the per-thread basis, cycles during whic
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/broadwellx/ |
| H A D | pipeline.json | 382 "PublicDescription": "This event counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. This event is clocked by base clock (100 Mhz) on Sandy Bridge. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
582 "PublicDescription": "This event counts the number of instructions retired from execution. For instructions that consist of multiple micro-ops, this event counts the retirement of the last micro-op of the instruction. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. INST_RETIRED.ANY_P is counted by a programmable counter and it is an architectural performance event. Counting: Faulting executions of GETSEC/VM entry/VM Exit/MWait will not count as retired instructions.",
620 "PublicDescription": "This event counts the number of cycles during which Resource Allocation Table (RAT) external stall is sent to Instruction Decode Queue (IDQ) for the current thread. This also includes the cycles during which the Allocator is serving another thread.",
825 "PublicDescription": "This event counts cycles during which the reservation station (RS) is empty for the thread. Note: In ST-mode, not active thread should drive 0. This is usually caused by severely costly branch mispredictions, or allocator/FE issues.",
845 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 0.",
854 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 1.",
863 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 2.",
872 "PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 3.",
881 "PublicDescription": "This event counts, on the per-thread basis, cycles during whic
[all...] |