Home
last modified time | relevance | path

Searched +full:dual +full:- +full:channel (Results 1 – 25 of 452) sorted by relevance

12345678910>>...19

/linux/drivers/scsi/qla2xxx/
H A Dqla_devtbl.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
[all …]
/linux/include/linux/regulator/
H A Dda9121.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
/linux/drivers/gpu/drm/imx/ipuv3/
H A Dimx-ldb.c1 // SPDX-License-Identifier: GPL-2.0+
3 * i.MX drm driver - LVDS display bridge
11 #include <linux/media-bus-format.h>
13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
33 #include "imx-drm.h"
35 #define DRIVER_NAME "imx-ldb"
56 struct imx_ldb_channel *channel; member
73 return container_of(e, struct imx_ldb_encoder, encoder)->channel; in enc_to_imx_ldb_ch()
85 struct imx_ldb_channel channel[2]; member
97 struct imx_ldb *ldb = imx_ldb_ch->ldb; in imx_ldb_ch_set_bus_format()
[all …]
/linux/Documentation/fb/
H A Dviafb.rst6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
[all …]
/linux/drivers/regulator/
H A Dda9121-regulator.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
23 #include <dt-bindings/regulator/dlg,da9121-regulator.h>
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
38 managed regulators and simple non-configurable regulators.
64 the netlink mechanism. User-space applications can subscribe to these events
65 for real-time updates on various regulator events.
75 They provide two I2C-controlled DC/DC step-down converters with
101 tristate "Active-semi act8865 voltage regulator"
106 This driver controls a active-semi act8865 voltage output
110 tristate "Active-semi ACT8945A voltage regulator"
113 This driver controls a active-semi ACT8945A voltage regulator
114 via I2C bus. The ACT8945A features three step-down DC/DC converters
[all …]
/linux/drivers/video/fbdev/via/
H A Dlcd.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
18 /* Resolution: 640x480, Channel: single, Dithering: Enable */
20 /* Resolution: 800x600, Channel: single, Dithering: Enable */
22 /* Resolution: 1024x768, Channel: single, Dithering: Enable */
24 /* Resolution: 1280x768, Channel: single, Dithering: Enable */
26 /* Resolution: 1280x1024, Channel: dual, Dithering: Enable */
28 /* Resolution: 1400x1050, Channel: dual, Dithering: Enable */
30 /* Resolution: 1600x1200, Channel: dual, Dithering: Enable */
[all …]
H A Ddvi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
20 /* Resolution: 640x480, Channel: single, Dithering: Enable */
22 /* Resolution: 800x600, Channel: single, Dithering: Enable */
24 /* Resolution: 1024x768, Channel: single, Dithering: Enable */
26 /* Resolution: 1280x768, Channel: single, Dithering: Enable */
28 /* Resolution: 1280x1024, Channel: dual, Dithering: Enable */
30 /* Resolution: 1400x1050, Channel: dual, Dithering: Enable */
32 /* Resolution: 1600x1200, Channel: dual, Dithering: Enable */
/linux/drivers/w1/slaves/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # 1-wire slaves configuration
6 menu "1-wire Slaves"
11 Say Y here if you want to connect 1-wire thermal sensors to your
17 Say Y here if you want to connect 1-wire
23 Say Y or M here if you want to use a DS2405 1-wire
24 single-channel addressable switch.
25 This device can also work as a single-channel
29 tristate "8-Channel Addressable Switch (IO Expander) 0x29 family support (DS2408)"
31 Say Y here if you want to use a 1-wire
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
23 LDB split mode to support a dual link LVDS display. The channel indexes
27 For i.MX8qm LDB, each channel additionally supports up to 30bpp parallel
29 in dual mode or split mode. In dual mode, the two channels output identical
41 - fsl,imx8qm-ldb
[all …]
/linux/Documentation/scsi/
H A Dadvansys.rst1 .. SPDX-License-Identifier: GPL-2.0
8 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
9 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
10 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
28 - ABP3905 - Bus-Master PCI (16 CDB)
[all …]
H A Daic79xx.rst1 .. SPDX-License-Identifier: GPL-2.0
28 AIC-7901A Single Channel 64-bit PCI-X 133MHz to
30 AIC-7901B Single Channel 64-bit PCI-X 133MHz to
32 AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to
34 AIC-7902B Dual Channel 64-bit PCI-X 133MHz to
41 Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B
43 68-pin, two internal 68-pin)
44 Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B
46 68-pin, two internal 68-pin)
47 Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dxilinx-xadc.txt22 - compatible: Should be one of
23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
27 * "xlnx,system-management-wiz-1.3": When using the
30 - reg: Address and length of the register set for the device
31 - interrupts: Interrupt for the XADC control interface.
32 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
33 when using the axi-xadc or the axi-system-management-wizard this must be
37 - xlnx,external-mux:
42 * "dual": External multiplexer mode is used with two
[all …]
H A Dmicrochip,mcp3911.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Microchip MCP3911 Dual channel analog front end (ADC)
11 - Marcus Folkesson <marcus.folkesson@gmail.com>
12 - Kent Gustavsson <nedo80@gmail.com>
15 Bindings for the Microchip MCP3911 Dual channel ADC device. Datasheet can be
21 - microchip,mcp3910
22 - microchip,mcp3911
23 - microchip,mcp3912
[all …]
/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,admfm2000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: ADMFM2000 Dual Microwave Down Converter
11 - Kim Seer Paller <kimseer.paller@analog.com>
14 Dual microwave down converter module with input RF and LO frequency ranges
22 - adi,admfm2000
24 '#address-cells':
27 '#size-cells':
31 "^channel@[0-1]$":
[all …]
/linux/drivers/net/wireless/intel/iwlwifi/fw/api/
H A Drs.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022, 2024 Intel Corporation
12 * enum iwl_tlc_mng_cfg_flags - options for TLC config flags
18 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation
21 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation
36 * enum iwl_tlc_mng_cfg_cw - channel width options
37 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
38 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
39 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
40 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
[all …]
/linux/Documentation/devicetree/bindings/gpio/
H A Dxlnx,gpio-xilinx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neeli Srinivas <srinivas.neeli@amd.com>
14 to an AXI4-Lite interface. The AXI GPIO can be configured as either
15 a single or a dual-channel device. The width of each channel is
22 - xlnx,xps-gpio-1.00.a
27 "#gpio-cells":
33 gpio-controller: true
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-v3s-licheepi-zero-dock.dts4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
43 #include "sun8i-v3s-licheepi-zero.dts"
45 #include <dt-bindings/input/input.h>
49 compatible = "licheepi,licheepi-zero-dock", "licheepi,licheepi-zero",
50 "allwinner,sun8i-v3s";
63 allwinner,leds-active-low;
68 vref-supply = <&reg_vcc3v0>;
71 button-200 {
74 channel = <0>;
[all …]
H A Dsun6i-a31s-inet-q972.dts4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include "sun6i-reference-design-tablet.dtsi"
49 compatible = "inet-tek,inet-q972", "allwinner,sun6i-a31s";
60 compatible = "edt,edt-ft5406";
62 interrupt-parent = <&pio>;
64 touchscreen-size-x = <768>;
65 touchscreen-size-y = <1024>;
[all …]
H A Dsun8i-a23-evb.dts4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
45 /dts-v1/;
46 #include "sun8i-a23.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
54 compatible = "allwinner,sun8i-a23-evb", "allwinner,sun8i-a23";
63 stdout-path = "serial0:115200n8";
[all …]
/linux/drivers/staging/sm750fb/
H A Dsm750.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 sm750_dualTFT = 2, /* dual 18 bit tft */
21 /* vga channel is not concerned */
139 int channel;/* which channel this crtc stands for*/ member
142 /* below attributes belong to info->fix, their value depends on specific adaptor*/
164 int *channel; member
166 * which channel these outputs linked with,for sm750:
167 * *channel=0 means primary channel
168 * *channel=1 means secondary channel
169 * output->channel ==> &crtc->channel
[all …]
/linux/drivers/gpu/drm/bridge/imx/
H A Dimx8qxp-ldb.c1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/media-bus-format.h>
26 #include "imx-ldb-helper.h"
36 #define DRIVER_NAME "imx8qxp-ldb"
47 struct imx8qxp_ldb_channel channel[MAX_LDB_CHAN_NUM]; member
69 phy_cfg->bits_per_lane_and_dclk_cycle = 7; in imx8qxp_ldb_set_phy_cfg()
70 phy_cfg->lanes = 4; in imx8qxp_ldb_set_phy_cfg()
73 phy_cfg->differential_clk_rate = di_clk / 2; in imx8qxp_ldb_set_phy_cfg()
74 phy_cfg->is_slave = !imx8qxp_ldb->companion; in imx8qxp_ldb_set_phy_cfg()
76 phy_cfg->differential_clk_rate = di_clk; in imx8qxp_ldb_set_phy_cfg()
[all …]
/linux/Documentation/staging/
H A Drpmsg.rst17 flavor of real-time OS.
19 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP.
20 Typically, the dual cortex-A9 is running Linux in a SMP configuration,
25 hardware accelerators, and therefore are often used to offload CPU-intensive
28 These remote processors could also be used to control latency-sensitive
34 hardware accessible only by the remote processor, reserving kernel-controlled
37 Rpmsg is a virtio-based messaging bus that allows kernel drivers to communicate
54 Every rpmsg device is a communication channel with a remote processor (thus
59 When a driver starts listening on a channel, its rx callback is bound with
60 a unique rpmsg local address (a 32-bit integer). This way when inbound messages
[all …]
/linux/drivers/eisa/
H A Deisa.ids6 # Marc Zyngier <maz@wild-wind.fr.eu.org>
10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
25 ACE7010 "ACME Multi-Function Board"
39 ACR1711 "AcerFrame 1000 486/33 SYSTEM-2"
41 ACR3211 "AcerFrame 3000MP 486 SYSTEM-1"
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dmediatek,mt6370.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
13 MT6370 is a highly-integrated smart power management IC, which includes a
14 single cell Li-Ion/Li-Polymer switching battery charger, a USB Type-C &
15 Power Delivery (PD) controller, dual flash LED current sources, a RGB LED
26 wakeup-source: true
31 interrupt-controller: true
33 "#interrupt-cells":
[all …]

12345678910>>...19