| /freebsd/sys/contrib/device-tree/Bindings/ptp/ |
| H A D | brcm,ptp-dte.txt | 1 * Broadcom Digital Timing Engine(DTE) based PTP clock 9 "brcm,ptp-dte" 11 "brcm,iproc-ptp-dte" - for iproc based SoC's 12 - reg: address and length of the DTE block's NCO registers 16 ptp: ptp-dte@180af650 { 17 compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
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| /freebsd/sys/x86/iommu/ |
| H A D | amd_ctx.c | 429 vm_page_t pgtblr, uint8_t dte, uint32_t edte) in dte_entry_init_one() argument 445 dtep->initpass = (dte & ACPI_IVHD_INIT_PASS) != 0; in dte_entry_init_one() 446 dtep->eintpass = (dte & ACPI_IVHD_EINT_PASS) != 0; in dte_entry_init_one() 447 dtep->nmipass = (dte & ACPI_IVHD_NMI_PASS) != 0; in dte_entry_init_one() 448 dtep->sysmgt = (dte & ACPI_IVHD_SYSTEM_MGMT) >> 4; in dte_entry_init_one() 449 dtep->lint0pass = (dte & ACPI_IVHD_LINT0_PASS) != 0; in dte_entry_init_one() 450 dtep->lint1pass = (dte & ACPI_IVHD_LINT1_PASS) != 0; in dte_entry_init_one() 477 dte_entry_init(struct amdiommu_ctx *ctx, bool move, uint8_t dte, uint32_t edte) in dte_entry_init() argument 489 ("amdiommu%d initializing valid dte @%p %#jx", in dte_entry_init() 497 dte, edte); in dte_entry_init() [all …]
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| H A D | amd_drv.c | 651 uint8_t dte; member 672 ifu->dte = d4->Header.DataSetting; in amdiommu_find_unit_scan_ivrs() 678 ifu->dte = d4->Header.DataSetting; in amdiommu_find_unit_scan_ivrs() 695 ifu->dte = d4->Header.DataSetting; in amdiommu_find_unit_scan_ivrs() 707 ifu->dte = d8a->Header.DataSetting; in amdiommu_find_unit_scan_ivrs() 725 ifu->dte = d8a->Header.DataSetting; in amdiommu_find_unit_scan_ivrs() 735 ifu->dte = d8b->Header.DataSetting; in amdiommu_find_unit_scan_ivrs() 754 ifu->dte = d8b->Header.DataSetting; in amdiommu_find_unit_scan_ivrs() 769 ifu->dte = d8c->Header.DataSetting; in amdiommu_find_unit_scan_ivrs() 936 *dtep = ifu.dte; in amdiommu_find_unit() [all …]
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| H A D | amd_event.c | 99 const struct amdiommu_dte *dte; in amdiommu_event_log_print() local 105 dte = &unit->dev_tbl[ev_dte_p->devid]; in amdiommu_event_log_print() 107 printf("\tIllegal Dev Tab Entry dte@%p:", dte); in amdiommu_event_log_print() 108 for (i = 0, x = (const uint32_t *)dte; i < sizeof(*dte) / in amdiommu_event_log_print()
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| H A D | amd_intrmap.c | 231 uint8_t dte; in amdiommu_ir_find() local 251 error = amdiommu_find_unit_for_hpet(src, &unit, &rid, &dte, in amdiommu_ir_find() 255 error = amdiommu_find_unit(src, &unit, &rid, &dte, &edte, in amdiommu_ir_find()
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| H A D | amd_reg.h | 267 #define AMDIOMMU_EFR2_GCR3TRPM 0x0000000000000008ull /* GPA based GCR3 pointer in DTE */ 278 * Device Table Entry (DTE) 331 _Static_assert(sizeof(struct amdiommu_dte) == 8 * sizeof(uint32_t), "DTE");
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| /freebsd/sys/dev/uart/ |
| H A D | uart_if.m | 79 # This method retrieves the DTE and DCE signals and their corresponding 80 # delta bits. The delta bits include those corresponding to DTE signals 138 # This method allows changing DTE signals. The DTE delta bits indicate which 139 # signals are to be changed and the DTE bits themselves indicate whether to 141 # DTE delta bits set of those DTE signals that did change by this method.
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| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | fsl-imx-uart.txt | 9 - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works 20 and RTS_B is input, regardless of dte-mode. 39 fsl,dte-mode;
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| H A D | fsl-imx-uart.yaml | 75 fsl,dte-mode: 78 Indicate the uart works in DTE mode. The uart works in DCE mode by default. 152 fsl,dte-mode;
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx6qdl-apalis.dtsi | 812 fsl,dte-mode; 820 fsl,dte-mode; 828 fsl,dte-mode; 835 fsl,dte-mode; 1276 /* DTE mode */ 1293 /* DTE mode */ 1310 /* DTE mode */ 1325 /* DTE mode */
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| H A D | imx6dl-eckelmann-ci4x10.dts | 332 fsl,dte-mode; 343 fsl,dte-mode;
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| H A D | imx6qdl-colibri.dtsi | 671 fsl,dte-mode; 680 fsl,dte-mode; 689 fsl,dte-mode; 1049 /* DTE mode */
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| H A D | imx6ull-colibri.dtsi | 274 fsl,dte-mode; 282 fsl,dte-mode; 289 fsl,dte-mode;
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| H A D | mba6ulx.dtsi | 344 /* for DTE mode, add below change */ 345 /* fsl,dte-mode; */
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| H A D | imx6q-arm2.dts | 209 fsl,dte-mode;
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| H A D | imx7-colibri.dtsi | 583 fsl,dte-mode; 593 fsl,dte-mode; 603 fsl,dte-mode;
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| H A D | imx53-cx9020.dts | 170 fsl,dte-mode;
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| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra20-trimslice.dts | 98 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; 213 "dte", "gma", "gmc", "gmd", "gpu",
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| H A D | tegra20-tamonten.dtsi | 92 nvidia,pins = "dtb", "dtc", "dte"; 206 "dtc", "dte", "gpu", "sdio1",
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| H A D | tegra20-ventana.dts | 104 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; 241 nvidia,pins = "dte", "spif";
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| /freebsd/share/misc/ |
| H A D | scsi_modes | 304 {DTE (Disable Transfer on Error)} t1 338 {DTE} t1
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | nvidia,tegra20-pinmux.yaml | 36 dap2, dap3, dap4, ddc, dta, dtb, dtc, dtd, dte, dtf, gma,
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| H A D | nvidia,tegra20-pinmux.txt | 76 ddc, dta, dtb, dtc, dtd, dte, dtf, gma, gmb, gmc, gmd, gme, gpu, gpu7,
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| /freebsd/sys/amd64/vmm/amd/ |
| H A D | amdvi_priv.h | 67 * Device table entry or DTE 187 } dte; member
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| H A D | amdvi_hw.c | 114 * Bus(256) x Dev(32) x Fun(8) x DTE(256 bits or 32 bytes). 342 device_printf(softc->dev, "Invalidated DTE:0x%x\n", devid); in amdvi_cmd_inv_dte() 713 ctrl->dte.base = vtophys(amdvi_dte) / PAGE_SIZE; in amdvi_init_dte() 714 ctrl->dte.size = 0x1FF; /* 2MB device table. */ in amdvi_init_dte()
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