Searched +full:dsi +full:- +full:phy +full:- +full:28 +full:nm (Results  1 – 12 of 12) sorted by relevance
| /linux/drivers/gpu/drm/msm/dsi/phy/ | 
| H A D | dsi_phy.c | 1 // SPDX-License-Identifier: GPL-2.0-only6 #include <linux/clk-provider.h>
 10 #include <dt-bindings/phy/phy.h>
 15 	(((n) >= 0) ? (((n) + (d) - 1) / (d)) : (((n) - (d) + 1) / (d)))
 22 	v = (tmax - tmin) * percent;  in linear_inter()
 25 		return max_t(s32, min_result, v - 1);  in linear_inter()
 37 	temp = 300 * coeff - ((timing->clk_prepare >> 1) + 1) * 2 * ui;  in dsi_dphy_timing_calc_clk_zero()
 38 	tmin = S_DIV_ROUND_UP(temp, ui) - 2;  in dsi_dphy_timing_calc_clk_zero()
 48 	temp = (timing->hs_rqst + timing->clk_prepare + clk_z) & 0x7;  in dsi_dphy_timing_calc_clk_zero()
 49 	timing->clk_zero = clk_z + 8 - temp;  in dsi_dphy_timing_calc_clk_zero()
 [all …]
 
 | 
| H A D | dsi_phy.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 10 #include <linux/clk-provider.h>
 14 #include "dsi.h"
 17 	int (*pll_init)(struct msm_dsi_phy *phy);
 18 	int (*enable)(struct msm_dsi_phy *phy,
 20 	void (*disable)(struct msm_dsi_phy *phy);
 21 	void (*save_pll_state)(struct msm_dsi_phy *phy);
 22 	int (*restore_pll_state)(struct msm_dsi_phy *phy);
 23 	bool (*set_continuous_clock)(struct msm_dsi_phy *phy, bool enable);
 [all …]
 
 | 
| /linux/arch/arm64/boot/dts/qcom/ | 
| H A D | msm8976.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause3  * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
 9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 10 #include <dt-bindings/clock/qcom,gcc-msm8976.h>
 11 #include <dt-bindings/clock/qcom,rpmcc.h>
 12 #include <dt-bindings/gpio/gpio.h>
 13 #include <dt-bindings/interrupt-controller/arm-gic.h>
 14 #include <dt-bindings/interrupt-controller/irq.h>
 15 #include <dt-bindings/power/qcom-rpmpd.h>
 18 	interrupt-parent = <&intc>;
 [all …]
 
 | 
| H A D | sm6125.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
 7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 8 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
 9 #include <dt-bindings/clock/qcom,rpmcc.h>
 10 #include <dt-bindings/dma/qcom-gpi.h>
 11 #include <dt-bindings/gpio/gpio.h>
 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
 13 #include <dt-bindings/power/qcom-rpmpd.h>
 16 	interrupt-parent = <&intc>;
 [all …]
 
 | 
| H A D | msm8917.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only3 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 4 #include <dt-bindings/clock/qcom,gcc-msm8917.h>
 5 #include <dt-bindings/clock/qcom,rpmcc.h>
 6 #include <dt-bindings/interrupt-controller/arm-gic.h>
 7 #include <dt-bindings/power/qcom-rpmpd.h>
 8 #include <dt-bindings/thermal/thermal.h>
 11 	interrupt-parent = <&intc>;
 13 	#address-cells = <2>;
 14 	#size-cells = <2>;
 [all …]
 
 | 
| H A D | sdm670.dtsi | 1 // SPDX-License-Identifier: GPL-2.09 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
 10 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
 11 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 12 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
 13 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
 14 #include <dt-bindings/clock/qcom,rpmh.h>
 15 #include <dt-bindings/dma/qcom-gpi.h>
 16 #include <dt-bindings/gpio/gpio.h>
 17 #include <dt-bindings/interconnect/qcom,osm-l3.h>
 [all …]
 
 | 
| H A D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 8 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
 9 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
 10 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
 11 #include <dt-bindings/clock/qcom,rpmcc.h>
 12 #include <dt-bindings/firmware/qcom,scm.h>
 13 #include <dt-bindings/interconnect/qcom,sdm660.h>
 14 #include <dt-bindings/power/qcom-rpmpd.h>
 15 #include <dt-bindings/gpio/gpio.h>
 [all …]
 
 | 
| H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 7 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
 8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
 9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
 10 #include <dt-bindings/clock/qcom,rpmcc.h>
 11 #include <dt-bindings/dma/qcom-gpi.h>
 12 #include <dt-bindings/firmware/qcom,scm.h>
 13 #include <dt-bindings/gpio/gpio.h>
 14 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
 [all …]
 
 | 
| /linux/arch/arm/boot/dts/qcom/ | 
| H A D | qcom-msm8974.dtsi | 1 // SPDX-License-Identifier: GPL-2.02 /dts-v1/;
 4 #include <dt-bindings/interconnect/qcom,msm8974.h>
 5 #include <dt-bindings/interrupt-controller/arm-gic.h>
 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 7 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
 8 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
 9 #include <dt-bindings/clock/qcom,rpmcc.h>
 10 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
 11 #include <dt-bindings/gpio/gpio.h>
 [all …]
 
 | 
| H A D | qcom-msm8226.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause6 /dts-v1/;
 8 #include <dt-bindings/interrupt-controller/arm-gic.h>
 9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 10 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
 11 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
 12 #include <dt-bindings/clock/qcom,rpmcc.h>
 13 #include <dt-bindings/gpio/gpio.h>
 14 #include <dt-bindings/power/qcom-rpmpd.h>
 15 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
 [all …]
 
 | 
| /linux/ | 
| H A D | MAINTAINERS | 5 ---------------------------------------------------21 	W: *Web-page* with status/info
 23 	B: URI for where to file *bugs*. A web-page with detailed bug
 28 	   patches to the given subsystem. This is either an in-tree file,
 29 	   or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
 46 	   N:	[^a-z]tegra	all files whose path contains tegra
 64 ----------------
 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
 85 L:	linux-scsi@vger.kernel.org
 88 F:	drivers/scsi/3w-*
 [all …]
 
 | 
| H A D | CREDITS | 1 	This is at least a partial credits-file of people that have4 	scripts.  The fields are: name (N), email (E), web-address
 6 	snail-mail address (S).
 10 ----------
 51 D: in-kernel DRM Maintainer
 76 E: tim_alpaerts@toyota-motor-europe.com
 80 S: B-2610 Wilrijk-Antwerpen
 85 W: http://www-stu.christs.cam.ac.uk/~aia21/
 106 D: Maintainer of ide-cd and Uniform CD-ROM driver,
 107 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update.
 [all …]
 
 |