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Searched +full:dp +full:- +full:connector (Results 1 – 25 of 62) sorted by relevance

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/freebsd/sys/contrib/device-tree/Bindings/display/connector/
H A Ddp-connector.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/connector/dp-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort Connector
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
14 const: dp-connector
20 - full-size
21 - mini
23 hpd-gpios:
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-rockchip-usbdp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Wang <frank.wang@rock-chips.com>
11 - Zhang Yubing <yubing.zhang@rock-chips.com>
16 - rockchip,rk3588-usbdp-phy
21 "#phy-cells":
24 - PHY_TYPE_USB3
25 - PHY_TYPE_DP
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H A Dsamsung,usb3-drd-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy
18 0 - UTMI+ type phy,
19 1 - PIPE3 type phy.
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsa8295p-adp.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/spmi/spmi.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include "sa8540p-pmics.dtsi"
19 compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
26 stdout-path = "serial0:115200n8";
29 dp2-connector {
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H A Dqcs6490-rb3gen2.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19 /delete-node/ &ipa_fw_mem;
20 /delete-node/ &rmtfs_mem;
21 /delete-node/ &adsp_mem;
22 /delete-node/ &cdsp_mem;
23 /delete-node/ &video_mem;
24 /delete-node/ &wlan_ce_mem;
25 /delete-node/ &wpss_mem;
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H A Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
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/freebsd/sys/contrib/device-tree/Bindings/display/
H A Ddp-aux-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
14 are hooked up to them. This is the DP AUX bus. Over the DP AUX bus
16 particular, DP sinks support DDC over DP AUX which allows tunneling
19 To model this relationship, DP sinks should be placed as children
20 of the DP controller under the "aux-bus" node.
23 possible it will be extended in the future to handle the DP case.
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/freebsd/sys/contrib/device-tree/Bindings/platform/
H A Dacer,aspire1-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/platform/acer,aspire1-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nikita Travkin <nikita@trvn.ru>
15 laptop lid status and HPD events for the USB Type-C DP alt mode.
19 const: acer,aspire1-ec
27 connector:
28 $ref: /schemas/connector/usb-connector.yaml#
31 - compatible
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/freebsd/sys/dev/drm2/
H A Ddrm_edid.c3 * Copyright (c) 2007-2008 Intel Corporation
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
40 (((edid)->version > (maj)) || \
41 ((edid)->version == (maj) && (edid)->revision > (min)))
70 /* Force reduced-blanking timings for detailed modes */
74 struct drm_connector *connector; member
102 /* Envision Peripherals, Inc. EN-7100e */
111 /* LG Philips LCD LP154W01-A5 */
123 /* Samsung SyncMaster 22[5-6]BW */
156 "Minimum number of valid EDID header bytes (0-8, default 6)");
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Danalogix,dp.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/analogix,dp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
21 clock-names: true
25 phy-names:
26 const: dp
28 force-hpd:
34 hpd-gpios:
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H A Dmegachips-stdpxxxx-ge-b850v3-fw.txt2 STDP4028-ge-b850v3-fw bridges (LVDS-DP)
3 STDP2690-ge-b850v3-fw bridges (DP-DP++)
7 Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
12 suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with
19 stdp4028-ge-b850v3-fw required properties:
20 - compatible : "megachips,stdp4028-ge-b850v3-fw"
21 - reg : I2C bus address
22 - interrupts : one interrupt should be described here, as in
24 - ports : One input port(reg = <0>) and one output port(reg = <1>)
26 stdp2690-ge-b850v3-fw required properties:
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H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
39 vdd18-supply:
42 vdd33-supply:
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H A Dgoogle,cros-ec-anx7688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/google,cros-ec-anx7688.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC ANX7688 HDMI to DP Converter through Type-C Port
10 - Nicolas Boichat <drinkcat@chromium.org>
14 DisplayPort 1.3 Ultra-HDi (4096x2160p60). It is an Analogix ANX7688 chip
16 (See google,cros-ec.yaml). It is accessed using I2C tunneling through
18 (See google,cros-ec-i2c-tunnel.yaml).
22 const: google,cros-ec-anx7688
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H A Dps8640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Boichat <drinkcat@chromium.org>
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
28 powerdown-gpios:
32 reset-gpios:
36 vdd12-supply:
39 vdd33-supply:
42 aux-bus:
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/freebsd/sys/contrib/device-tree/Bindings/display/samsung/
H A Dsamsung,exynos5-dp.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos5-dp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
17 const: samsung,exynos5-dp
25 clock-names:
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am6548-iot2050-advanced-pg2.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) Siemens AG, 2018-2023
9 * AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 2
10 * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
16 /dts-v1/;
18 #include "k3-am6548-iot2050-advanced-common.dtsi"
19 #include "k3-am65-iot2050-common-pg2.dtsi"
20 #include "k3-am65-iot2050-arduino-connector.dtsi"
21 #include "k3-am65-iot2050-dp.dtsi"
[all …]
H A Dk3-am6548-iot2050-advanced-m2.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) Siemens AG, 2018-2023
9 * AM6548-based (quad-core) IOT2050 M.2 variant (based on Advanced Product
10 * Generation 2), 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
16 #include "k3-am6548-iot2050-advanced-common.dtsi"
17 #include "k3-am65-iot2050-common-pg2.dtsi"
18 #include "k3-am65-iot2050-arduino-connector.dtsi"
19 #include "k3-am65-iot2050-dp.dtsi"
22 compatible = "siemens,iot2050-advanced-m2", "ti,am654";
[all …]
H A Dk3-am6528-iot2050-basic-pg2.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) Siemens AG, 2018-2021
9 * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 2
10 * 1 GB RAM, no eMMC, main_uart0 on connector X30
13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
16 /dts-v1/;
18 #include "k3-am6528-iot2050-basic-common.dtsi"
19 #include "k3-am65-iot2050-common-pg2.dtsi"
20 #include "k3-am65-iot2050-dp.dtsi"
21 #include "k3-am65-iot2050-usb3.dtsi"
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-so
[all...]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-a83t-cubietruck-plus.dts2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
52 compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
63 hdmi-connector {
64 compatible = "hdmi-connector";
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-sck-kv-g-revB.dtso1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
16 /dts-v1/;
20 compatible = "xlnx,zynqmp-sk-kv260-rev2",
21 "xlnx,zynqmp-sk-kv260-rev1",
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H A Dzynqmp-zcu100-revC.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
12 /dts-v1/;
15 #include "zynqmp-clk-ccf.dtsi"
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/gpio/gpio.h>
19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 #include <dt-bindings/phy/phy.h>
[all …]
/freebsd/sys/dev/ida/
H A Didareg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 * board register offsets for SMART-2 controllers
66 #define SOFT_ERROR 0x02 /* Non-fatal error. */
103 #define CMD_PASSTHROUGH 0x90 /* Pass-through operation */
148 struct ida_drive_param dp; /* logical drive parameter table */ member
161 struct ida_drive_param dp; /* logical drive parameter table */ member
184 u_int32_t nd_map; /* Non-disk map */
202 u_int16_t big_nd_map[8]; /* Big non-disk map */
274 #define MPDF_DRIVE_EXTERNAL 0x10 /* Connected to external connector. */
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra186-p3509-0000+p3636-0001.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
30 stdout-path = "serial0:115200n8";
41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
42 phy-handle = <&phy>;
43 phy-mode = "rgmii-id";
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a779a0-falcon-cpu.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
16 compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
30 stdout-path = "serial0:115200n8";
34 compatible = "gpio-keys";
36 pinctrl-0 = <&keys_pins>;
37 pinctrl-names = "default";
39 key-1 {
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