Searched +full:dove +full:- +full:divider +full:- +full:clock (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/clk/mvebu/ |
| H A D | dove.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Marvell Dove SoC clocks
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
14 #include <linux/clk-provider.h>
18 #include "dove-divider.h"
23 * Dove PLL sample-at-reset configuration
39 * SAR0[11:9] : CPU to L2 Clock divider ratio
46 * SAR0[15:12] : CPU to DDR DRAM Clock divider ratio
157 * Clock Gating Control
185 of_find_compatible_node(NULL, NULL, "marvell,dove-gating-clock"); in dove_clk_init()
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| H A D | dove-divider.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Marvell Dove PMU Core PLL divider driver
8 #include <linux/clk-provider.h>
15 #include "dove-divider.h"
53 unsigned int divider; in dove_get_divider() local
56 val = readl_relaxed(dc->base + DIV_CTRL0); in dove_get_divider()
57 val >>= dc->div_bit_start; in dove_get_divider()
59 divider = val & ~(~0 << dc->div_bit_size); in dove_get_divider()
61 if (dc->divider_table) in dove_get_divider()
62 divider = dc->divider_table[divider]; in dove_get_divider()
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| /linux/Documentation/devicetree/bindings/display/armada/ |
| H A D | marvell,dove-lcd.txt | 4 - compatible: value should be "marvell,dove-lcd".
5 - reg: base address and size of the LCD controller
6 - interrupts: single interrupt number for the LCD controller
7 - port: video output port with endpoints, as described by graph.txt
11 - clocks: as described by clock-bindings.txt
12 - clock-names: as described by clock-bindings.txt
13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | dove.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 compatible = "marvell,dove";
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
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| /linux/drivers/gpu/drm/armada/ |
| H A D | armada_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
36 * This is how it is defined by CEA-861-D - line and pixel numbers are
57 * Odd frame, 563 total lines, VSYNC at line 543-548, pixel 1128.
58 * Even frame, 562 total lines, VSYNC at line 542-547, pixel 2448.
62 * vtotal = mode->crtc_vtotal + 1;
63 * vbackporch = mode->crtc_vsync_start - mode->crtc_vdisplay + 1;
64 * vhorizpos = mode->crtc_hsync_start - mode->crtc_htotal / 2
66 * vtotal = mode->crtc_vtotal;
67 * vbackporch = mode->crtc_vsync_start - mode->crtc_vdisplay;
68 * vhorizpos = mode->crtc_hsync_start;
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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