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/linux/Documentation/devicetree/bindings/iio/adc/
H A Davia-hx711.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
17 - dout-gpio is the sensor data the sensor responds to the clock
25 - avia,hx711
27 sck-gpios:
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/linux/drivers/pinctrl/starfive/
H A Dpinctrl-starfive-jh7100.c1 // SPDX-License-Identifier: GPL-2.0
26 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
29 #include "../pinctrl-utils.h"
33 #define DRIVER_NAME "pinctrl-starfive"
37 * https://github.com/starfive-tech/JH7100_Docs
48 * The following 32-bit registers come in pairs, but only the offset of the
49 * first register is defined. The first controls (interrupts for) GPIO 0-31 and
50 * the second GPIO 32-63.
54 * Interrupt Type. If set to 1 the interrupt is edge-triggered. If set to 0 the
55 * interrupt is level-triggered.
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H A Dpinctrl-starfive-jh7110.c1 // SPDX-License-Identifier: GPL-2.0
27 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
30 #include "../pinctrl-utils.h"
33 #include "pinctrl-starfive-jh7110.h"
52 * | 31 - 24 | 23 - 16 | 15 - 10 | 9 - 8 | 7 - 0 |
53 * | din | dout | doen | function | pin |
100 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_pin_dbg_show()
102 seq_printf(s, "%s", dev_name(pctldev->dev)); in jh7110_pin_dbg_show()
104 if (pin < sfp->gc.ngpio) { in jh7110_pin_dbg_show()
107 u32 dout = readl_relaxed(sfp->base + info->dout_reg_base + offset); in jh7110_pin_dbg_show() local
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H A Dpinctrl-starfive-jh7110.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/pinctrl/pinconf-generic.h>
17 struct pinctrl_gpio_range gpios; member
43 /* gpio dout/doen/din/gpioinput register */
59 unsigned int din, u32 dout,
69 unsigned int din, u32 dout, u32 doen);
/linux/Documentation/devicetree/bindings/sound/
H A Dmaxim,max98925.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ryan Lee <ryans.lee@maximintegrated.com>
15 - maxim,max98925
16 - maxim,max98926
17 - maxim,max98927
22 reset-gpios:
25 '#sound-dai-cells':
28 vmon-slot-no:
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/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-mipi-dbi-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Noralf Trønnes <noralf@tronnes.org>
23 - Power:
24 - Vdd: Power supply for display module
25 Called power-supply in this binding.
26 - Vddi: Logic level supply for interface signals
27 Called io-supply in this binding.
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/linux/arch/riscv/boot/dts/allwinner/
H A Dsun20i-d1-nezha.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
7 * The Nezha-D1 has a 40-pin IO header. Some of these pins are routed
8 * directly to pads on the SoC, others come from an 8-bit pcf857x IO
12 * Lines which are routed to the 40-pin header are named as follows:
15 * <pin#> is the actual pin number of the 40-pin header
20 * http://dl.linux-sunxi.org/D1/D1_Nezha_development_board_schematic_diagram_20210224.pdf
23 #include <dt-bindings/gpio/gpio.h>
24 #include <dt-bindings/input/input.h>
26 /dts-v1/;
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/linux/arch/microblaze/boot/dts/
H A Dsystem.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2007-2008 Xilinx, Inc.
6 * (C) Copyright 2007-2009 Michal Simek
13 * XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101
16 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
32 stdout-path = "/plb@0/serial@84000000";
35 #address-cells = <1>;
37 #size-cells = <0>;
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/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/meson-aiu.h>
13 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
22 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
33 led-stat {
34 label = "nanopi-k2:blue:stat";
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H A Dmeson-gxl-s905x-khadas-vim.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxl-s905x-p212.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/sound/meson-aiu.h>
13 compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
16 adc-keys {
17 compatible = "adc-keys";
18 io-channels = <&saradc 0>;
19 io-channel-names = "buttons";
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/linux/drivers/gpio/
H A Dgpio-max730x.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * 28 GPIOs. 8 of them can trigger an interrupt. See datasheet for more
11 * - DIN must be stable at the rising edge of clock.
12 * - when writing:
13 * - always clock in 16 clocks at once
14 * - at DIN: D15 first, D0 last
15 * - D0..D7 = databyte, D8..D14 = commandbyte
16 * - D15 = low -> write command
17 * - when reading
18 * - always clock in 16 clocks at once
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H A Dgpio-xilinx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2008 - 2013 Xilinx, Inc.
45 * struct xgpio_instance - Stores information about GPIO device
82 return -EINVAL; in xgpio_regoffset()
88 void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32); in xgpio_read_ch()
96 void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32); in xgpio_write_ch()
104 unsigned long lastbit = find_nth_bit(chip->map, 64, chip->gc.ngpio - 1); in xgpio_read_ch_all()
113 unsigned long lastbit = find_nth_bit(chip->map, 64, chip->gc.ngpio - 1); in xgpio_write_ch_all()
121 * xgpio_get - Read the specified signal of the GPIO device.
134 unsigned long bit = find_nth_bit(chip->map, 64, gpio); in xgpio_get()
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/linux/sound/soc/codecs/
H A Dcs35l56.c1 // SPDX-License-Identifier: GPL-2.0-only
27 #include <sound/cs-amp-lib.h>
31 #include <sound/soc-dapm.h>
43 flush_work(&cs35l56->dsp_work); in cs35l56_wait_dsp_ready()
66 static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0);
181 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs35l56_play_event()
186 dev_dbg(cs35l56->base.dev, "play: %d\n", event); in cs35l56_play_event()
191 return regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, in cs35l56_play_event()
195 ret = regmap_read_poll_timeout(cs35l56->base.regmap, in cs35l56_play_event()
196 cs35l56->base.fw_reg->transducer_actual_ps, in cs35l56_play_event()
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pll-supply = <&reg_1v05_vdd>;
23 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24 dvddio-pex-supply = <&reg_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26 hvdd-pex-supply = <&reg_module_3v3>;
27 vddio-pex-ctl-supply = <&reg_module_3v3>;
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H A Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pll-supply = <&reg_1v05_vdd>;
22 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23 dvddio-pex-supply = <&reg_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25 hvdd-pex-supply = <&reg_module_3v3>;
26 vddio-pex-ctl-supply = <&reg_module_3v3>;
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H A Dtegra30-asus-p1801-t.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
13 model = "Asus Portable AiO P1801-T";
14 compatible = "asus,p1801-t", "nvidia,tegra30";
15 chassis-type = "convertible";
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H A Dtegra30-asus-tf600t.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
16 chassis-type = "convertible";
34 * pre-existing /chosen node to be available to insert the
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/linux/drivers/mfd/
H A Dtps65010.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * tps65010 - driver for tps6501x power management chips
6 * Copyright (C) 2004-2005 David Brownell
28 /*-------------------------------------------------------------------------*/
38 /*-------------------------------------------------------------------------*/
41 * voltage regulators, lithium ion/polymer battery charging, GPIOs, LEDs,
48 * battery-insert != device-on.
85 /*-------------------------------------------------------------------------*/
185 struct tps65010 *tps = s->private; in dbg_show()
191 switch (tps->model) { in dbg_show()
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/linux/drivers/iio/adc/
H A Dad7606.c1 // SPDX-License-Identifier: GPL-2.0
103 -128, 1, 127,
107 -512, 4, 508,
135 .name = "ad7605-4",
144 .name = "ad7606-8",
155 .name = "ad7606-6",
167 .name = "ad7606-4",
278 if (st->gpio_reset) { in ad7606_reset()
279 gpiod_set_value(st->gpio_reset, 1); in ad7606_reset()
281 gpiod_set_value(st->gpio_reset, 0); in ad7606_reset()
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