Searched +full:dmc +full:- +full:520 (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/edac/dmc-520.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: ARM DMC-520 EDAC10 - Lei Wang <lewan@microsoft.com>13 DMC-520 node is defined to describe DRAM error detection and correction.20 - const: brcm,dmc-52021 - const: arm,dmc-52030 interrupt-names:[all …]
1 // SPDX-License-Identifier: GPL-2.04 * EDAC driver for DMC-520 memory controller.25 /* DMC-520 registers */43 /* DMC-520 types, masks and bitfields */78 * The max-length message would be: "rank:7 bank:15 row:262143 col:1023".79 * Max length is 34. Using a 40-size buffer is enough.82 #define EDAC_MOD_NAME "dmc520-edac"165 * error_lock is to protect concurrent writes to the mci->error_desc through180 return readl(pvt->reg_base + offset); in dmc520_read_reg()185 writel(val, pvt->reg_base + offset); in dmc520_write_reg()[all …]