| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am68-sk-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include "k3-j721s2.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 14 bootph-all; 20 reserved_memory: reserved-memory { 21 #address-cells = <2>; 22 #size-cells = <2>; 27 no-map; [all …]
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| H A D | k3-j784s4-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/net/ti-dp83867.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include "k3-j784s4.dtsi" 15 compatible = "ti,j784s4-evm", "ti,j784s4"; 19 stdout-path = "serial2:115200n8"; 36 bootph-all; 42 reserved_memory: reserved-memory { [all …]
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| H A D | k3-am69-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 /dts-v1/; 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include "k3-j784s4.dtsi" 16 compatible = "ti,am69-sk", "ti,j784s4"; 20 stdout-path = "serial2:115200n8"; 36 bootph-all; 42 reserved_memory: reserved-memory { [all …]
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| H A D | k3-j721e-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include "k3-j721e.dtsi" 15 bootph-all; 21 reserved_memory: reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 29 no-map; 32 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { [all …]
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| H A D | k3-j721s2-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include "k3-j721s2.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 16 bootph-all; 23 reserved_memory: reserved-memory { 24 #address-cells = <2>; 25 #size-cells = <2>; 31 no-map; [all …]
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| H A D | k3-j722s-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 4 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 9 /dts-v1/; 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy.h> 13 #include "k3-j722s.dtsi" 14 #include "k3-serdes.h" 17 compatible = "ti,j722s-evm", "ti,j722s"; 29 stdout-path = &main_uart0; 37 bootph-pre-ram; [all …]
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| H A D | k3-am642-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/phy/phy.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/net/ti-dp83867.h> 11 #include <dt-bindings/leds/common.h> 12 #include "k3-am642.dtsi" 14 #include "k3-serdes.h" 17 compatible = "ti,am642-sk", "ti,am642"; [all …]
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| H A D | k3-j7200-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 10 #include "k3-j7200.dtsi" 15 bootph-all; 21 reserved_memory: reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 29 no-map; [all …]
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| H A D | k3-am642-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/phy/phy.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include "k3-am642.dtsi" 14 #include "k3-serdes.h" 17 compatible = "ti,am642-evm", "ti,am642"; [all …]
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| H A D | k3-j721e-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM 8 /dts-v1/; 10 #include "k3-j721e.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/net/ti-dp83867.h> 16 compatible = "ti,j721e-sk", "ti,j721e"; 29 stdout-path = "serial2:115200n8"; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | brcm,bcm2835-dma.txt | 1 * BCM2835 DMA controller 3 The BCM2835 DMA controller has 16 channels in total. 11 - compatible: Should be "brcm,bcm2835-dma". 12 - reg: Should contain DMA registers location and length. 13 - interrupts: Should contain the DMA interrupts associated 14 to the DMA channels in ascending order. 15 - interrupt-names: Should contain the names of the interrupt 17 Use "dma-shared-all" for the common interrupt line 18 that is shared by all dma channels. 19 - #dma-cells: Must be <1>, the cell in the dmas property of the [all …]
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| H A D | sprd-dma.txt | 1 * Spreadtrum DMA controller 3 This binding follows the generic DMA bindings defined in dma.txt. 6 - compatible: Should be "sprd,sc9860-dma". 7 - reg: Should contain DMA registers location and length. 8 - interrupts: Should contain one interrupt shared by all channel. 9 - #dma-cells: must be <1>. Used to represent the number of integer 11 - dma-channels : Number of DMA channels supported. Should be 32. 12 - clock-names: Should contain the clock of the DMA controller. 13 - clocks: Should contain a clock specifier for each entry in clock-names. 16 - #dma-channels : Number of DMA channels supported. Should be 32. [all …]
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| H A D | zxdma.txt | 1 * ZTE ZX296702 DMA controller 4 - compatible: Should be "zte,zx296702-dma" 5 - reg: Should contain DMA registers location and length. 6 - interrupts: Should contain one interrupt shared by all channel 7 - #dma-cells: see dma.txt, should be 1, para number 8 - dma-channels: physical channels supported 9 - dma-requests: virtual channels supported, each virtual channel 11 - clocks: clock required 16 dma: dma-controller@09c00000{ 17 compatible = "zte,zx296702-dma"; [all …]
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| H A D | owl-dma.txt | 1 * Actions Semi Owl SoCs DMA controller 3 This binding follows the generic DMA bindings defined in dma.txt. 6 - compatible: Should be "actions,s900-dma". 7 - reg: Should contain DMA registers location and length. 8 - interrupts: Should contain 4 interrupts shared by all channel. 9 - #dma-cells: Must be <1>. Used to represent the number of integer 11 - dma-channels: Physical channels supported. 12 - dma-requests: Number of DMA request signals supported by the controller. 13 Refer to Documentation/devicetree/bindings/dma/dma.txt 14 - clocks: Phandle and Specifier of the clock feeding the DMA controller. [all …]
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| H A D | k3dma.txt | 1 * Hisilicon K3 DMA controller 3 See dma.txt first 6 - compatible: Must be one of 7 - "hisilicon,k3-dma-1.0" 8 - "hisilicon,hisi-pcm-asp-dma-1.0" 9 - reg: Should contain DMA registers location and length. 10 - interrupts: Should contain one interrupt shared by all channel 11 - #dma-cells: see dma.txt, should be 1, para number 12 - dma-channels: physical channels supported 13 - dma-requests: virtual channels supported, each virtual channel [all …]
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| H A D | sirfsoc-dma.txt | 1 * CSR SiRFSoC DMA controller 3 See dma.txt first 6 - compatible: Should be "sirf,prima2-dmac", "sirf,atlas7-dmac" or 7 "sirf,atlas7-dmac-v2" 8 - reg: Should contain DMA registers location and length. 9 - interrupts: Should contain one interrupt shared by all channel 10 - #dma-cells: must be <1>. used to represent the number of integer 12 - clocks: clock required 17 dmac0: dma-controller@b00b0000 { 18 compatible = "sirf,prima2-dmac"; [all …]
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| H A D | qcom_bam_dma.txt | 1 QCOM BAM DMA controller 4 - compatible: must be one of the following: 5 * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084 6 * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960 7 * "qcom,bam-v1.7.0" for MSM8916 8 - reg: Address range for DMA registers 9 - interrupts: Should contain the one interrupt shared by all channels 10 - #dma-cells: must be <1>, the cell in the dmas property of the client device 12 - clocks: required clock 13 - clock-names: must contain "bam_clk" entry [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | stm32mp157a-microgea-stm32mp1.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved 9 compatible = "engicam,microgea-stm32mp1", "st,stm32mp157"; 16 reserved-memory { 17 #address-cells = <1>; 18 #size-cells = <1>; 22 compatible = "shared-dma-pool"; 24 no-map; 28 compatible = "shared-dma-pool"; 30 no-map; [all …]
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| H A D | stm32mp157a-icore-stm32mp1.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved 9 compatible = "engicam,icore-stm32mp1", "st,stm32mp157"; 16 reserved-memory { 17 #address-cells = <1>; 18 #size-cells = <1>; 22 compatible = "shared-dma-pool"; 24 no-map; 28 compatible = "shared-dma-pool"; 30 no-map; [all …]
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| H A D | stm32mp15xx-osd32.dtsi | 1 /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */ 3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 7 #include "stm32mp15-pinctrl.dtsi" 9 #include <dt-bindings/mfd/st,stpmic1.h> 12 reserved-memory { 13 #address-cells = <1>; 14 #size-cells = <1>; 18 compatible = "shared-dma-pool"; 20 no-map; 24 compatible = "shared-dma-pool"; [all …]
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| H A D | stm32mp15xx-dhcor-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved 8 #include "stm32mp15-pinctrl.dtsi" 9 #include "stm32mp15xxac-pinctrl.dtsi" 10 #include <dt-binding [all...] |
| H A D | stm32mp157c-ed1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 /dts-v1/; 10 #include "stm32mp15-pinctrl.dtsi" 11 #include "stm32mp15xxaa-pinctrl.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> 18 compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; 25 stdout-path = "serial0:115200n8"; [all …]
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| H A D | stm32mp15xx-dkx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/mfd/st,stpmic1.h> 22 reserved-memor [all...] |
| H A D | stm32mp157c-phycore-stm32mp15-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de> 4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved 8 #include <dt-binding [all...] |
| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm2835-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 interrupt-parent = <&intc>; 11 dma: dma-controller@7e007000 { label 12 compatible = "brcm,bcm2835-dma"; 25 /* dma channe [all...] |