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/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-nsp-ax.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Broadcom Northstar Plus Ax stepping-specific bindings.
4 * Notable differences from B0+ are the secondary-boot-reg and
5 * lack of DMA coherency.
9 secondary-boot-reg = <0xffff042c>;
12 &dma {
13 /delete-property/ dma-coherent;
17 /delete-property/ dma-coherent;
21 /delete-property/ dma-coherent;
25 /delete-property/ dma-coherent;
[all …]
H A Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
59 next-level-cache = <&L2>;
[all …]
/linux/arch/arc/mm/
H A Ddma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 #include <linux/dma-map-ops.h>
11 * ARCH specific callbacks for generic noncoherent DMA ops
12 * - hardware IOC not available (or "dma-coherent" not set for device in DT)
13 * - But still handle both coherent and non-coherent requests from caller
15 * For DMA coherent hardware (IOC) generic code suffices
23 * Yeah this bit us - STAR 9000898266 in arch_dma_prep_coherent()
37 * dma-mapping: provide a generic dma-noncoherent implementation)"
40 * |----------------------------------------------------------------
[all …]
/linux/arch/riscv/mm/
H A Ddma-noncoherent.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V specific functions to support DMA for non-coherent devices
8 #include <linux/dma-direct.h>
9 #include <linux/dma-map-ops.h>
12 #include <asm/dma-noncoherent.h>
131 void arch_setup_dma_ops(struct device *dev, bool coherent) in arch_setup_dma_ops() argument
133 WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN, in arch_setup_dma_ops()
135 "%s %s: ARCH_DMA_MINALIGN smaller than riscv,cbom-block-size (%d < %d)", in arch_setup_dma_ops()
139 WARN_TAINT(!coherent && !noncoherent_supported, TAINT_CPU_OUT_OF_SPEC, in arch_setup_dma_ops()
140 "%s %s: device non-coherent but no non-coherent operations supported", in arch_setup_dma_ops()
[all …]
/linux/arch/arc/boot/dts/
H A Daxc003_idu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
24 input_clk: input-clk {
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
27 clock-frequency = <33333333>;
[all …]
H A Daxc003.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
24 input_clk: input-clk {
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
[all …]
/linux/tools/perf/pmu-events/arch/x86/amdzen4/
H A Ddata-fabric.json4 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 0.",
12 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 1.",
20 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 2.",
28 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 3.",
36 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 4.",
44 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 5.",
52 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 6.",
60 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 7.",
68 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 8.",
76 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 9.",
[all …]
/linux/arch/arm/mm/
H A Ddma-mapping-nommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on linux/arch/arm/mm/dma-mapping.c
5 * Copyright (C) 2000-2004 Russell King
8 #include <linux/dma-map-op
36 arch_setup_dma_ops(struct device * dev,bool coherent) arch_setup_dma_ops() argument
[all...]
H A Ddma-mapping.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mm/dma-mapping.c
5 * Copyright (C) 2000-2004 Russell King
7 * DMA uncached mapping support.
17 #include <linux/dma-direct.h>
18 #include <linux/dma-map-ops.h>
33 #include <asm/dma-iommu.h>
36 #include <asm/xen/xen-ops.h>
38 #include "dma.h"
60 #define COHERENT 1 macro
[all …]
/linux/kernel/dma/
H A Dcoherent.c1 // SPDX-License-Identifier: GPL-2.0
3 * Coherent per-device memory handling.
10 #include <linux/dma-direct.h>
11 #include <linux/dma-map-ops.h>
25 if (dev && dev->dma_mem) in dev_get_coherent_memory()
26 return dev->dma_mem; in dev_get_coherent_memory()
33 if (mem->use_dev_dma_pfn_offset) in dma_get_device_base()
34 return phys_to_dma(dev, PFN_PHYS(mem->pfn_base)); in dma_get_device_base()
35 return mem->device_base; in dma_get_device_base()
46 return ERR_PTR(-EINVAL); in dma_init_coherent_memory()
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/linux/Documentation/devicetree/bindings/dma/
H A Dapm-xgene-dma.txt1 Applied Micro X-Gene SoC DMA nodes
3 DMA nodes are defined to describe on-chip DMA interfaces in
4 APM X-Gene SoC.
6 Required properties for DMA interfaces:
7 - compatible: Should be "apm,xgene-dma".
8 - device_type: set to "dma".
9 - reg: Address and length of the register set for the device.
11 1st - DMA control and status register address space.
12 2nd - Descriptor ring control and status register address space.
13 3rd - Descriptor ring command register address space.
[all …]
H A Dmarvell,xor-v2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/marvell,xor-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
15 - const: marvell,xor-v2
16 - items:
17 - enum:
18 - marvell,armada-7k-xor
19 - const: marvell,xor-v2
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/linux/Documentation/devicetree/bindings/dma/xilinx/
H A Dxlnx,zynqmp-dma-1.0.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP DMA Engine
10 The Xilinx ZynqMP DMA engine supports memory to memory transfers,
12 control and rate control support for slave/peripheral dma access.
15 - Michael Tretter <m.tretter@pengutronix.de>
16 - Harini Katakam <harini.katakam@amd.com>
17 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
[all …]
/linux/drivers/of/
H A Ddevice.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/dma-direct.h> /* for bus_dma_region */
9 #include <linux/dma-map-ops.h>
19 * of_match_device - Tell if a struct device matches an of_device_id list
29 if (!matches || !dev->of_node || dev->of_node_reused) in of_match_device()
31 return of_match_node(matches, dev->of_node); in of_match_device()
38 struct device_node *node, *of_node = dev->of_node; in of_dma_set_restricted_buffer()
44 count = of_property_count_elems_of_size(of_node, "memory-region", in of_dma_set_restricted_buffer()
47 * If dev->of_node doesn't exist or doesn't contain memory-region, try in of_dma_set_restricted_buffer()
48 * the OF node having DMA configuration. in of_dma_set_restricted_buffer()
[all …]
/linux/Documentation/driver-api/usb/
H A Ddma.rst1 USB DMA
5 over how DMA may be used to perform I/O operations. The APIs are detailed
11 The big picture is that USB drivers can continue to ignore most DMA issues,
12 though they still must provide DMA-ready buffers (see
13 Documentation/core-api/dma-api-howto.rst). That's how they've worked through
14 the 2.4 (and earlier) kernels, or they can now be DMA-aware.
16 DMA-aware usb drivers:
18 - New calls enable DMA-aware drivers, letting them allocate dma buffers and
19 manage dma mappings for existing dma-ready buffers (see below).
21 - URBs have an additional "transfer_dma" field, as well as a transfer_flags
[all …]
/linux/arch/arc/plat-hsdk/
H A Dplatform.c1 // SPDX-License-Identifier: GPL-2.0-only
36 * --------------------- in hsdk_enable_gpio_intc_wire()
37 * | snps,archs-intc | in hsdk_enable_gpio_intc_wire()
38 * --------------------- in hsdk_enable_gpio_intc_wire()
40 * ---------------------- in hsdk_enable_gpio_intc_wire()
41 * | snps,archs-idu-intc | in hsdk_enable_gpio_intc_wire()
42 * ---------------------- in hsdk_enable_gpio_intc_wire()
46 * ------------------- in hsdk_enable_gpio_intc_wire()
47 * | snps,dw-apb-intc | in hsdk_enable_gpio_intc_wire()
48 * ------------------- in hsdk_enable_gpio_intc_wire()
[all …]
/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray-usb.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
6 compatible = "simple-bus";
7 #address-cells = <2>;
8 #size-cells = <2>;
13 * to 40-bit
15 dma-ranges = <0 0 0 0 0x100 0x0>;
17 usbphy0: usb-phy@0 {
18 compatible = "brcm,sr-usb-combo-phy";
20 #phy-cells = <1>;
25 compatible = "generic-xhci";
[all …]
/linux/arch/mips/mm/
H A Ddma-noncoherent.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
7 #include <linux/dma-direct.h>
8 #include <linux/dma-map-ops.h>
12 #include <asm/cpu-type.h>
18 * flush post-DMA.
20 * Warning on the terminology - Linux calls an uncached area coherent; MIPS
21 * terminology calls memory areas with hardware maintained coherency coherent.
24 * However this function is only called on non-I/O-coherent systems and only the
41 * the post-DMA flush/invalidate. in cpu_needs_post_dma_flush()
[all …]
/linux/Documentation/devicetree/bindings/ata/
H A Dapm-xgene.txt1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
7 - compatible : Shall contain:
8 * "apm,xgene-ahci"
9 - reg : First memory resource shall be the AHCI memory
19 - interrupts : Interrupt-specifier for SATA host controller IRQ.
20 - clocks : Reference to the clock entry.
21 - phys : A list of phandles + phy-specifiers, one for each
22 entry in phy-names.
23 - phy-names : Should contain:
[all …]
/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-soc.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 interrupt-parent = <&gic0>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 gic0: interrupt-controller@e1101000 {
15 compatible = "arm,gic-400", "arm,cortex-a15-gic";
16 interrupt-controller;
17 #interrupt-cells = <3>;
18 #address-cells = <2>;
19 #size-cells = <2>;
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dxgene-pci.txt1 * AppliedMicro X-Gene PCIe interface
4 - device_type: set to "pci"
5 - compatible: should contain "apm,xgene-pcie" to identify the core.
6 - reg: A list of physical base address and length for each set of controller
7 registers. Must contain an entry for each entry in the reg-names
9 - reg-names: Must include the following entries:
12 - #address-cells: set to <3>
13 - #size-cells: set to <2>
14 - ranges: ranges for the outbound memory, I/O regions.
15 - dma-ranges: ranges for the inbound memory regions.
[all …]
H A Dti,am65-pci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: pci-ep.yaml#
19 - ti,am654-pcie-ep
24 reg-names:
26 - const: app
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap810-ap0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 /dts-v1/;
14 compatible = "marvell,armada-ap810";
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "arm,psci-0.2";
28 ap810-ap0 {
29 #address-cells = <2>;
30 #size-cells = <2>;
[all …]
H A Darmada-cp11x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
[all …]
/linux/Documentation/devicetree/bindings/display/hisilicon/
H A Dhisi-ade.txt1 Device-Tree bindings for hisilicon ADE display controller driver
8 - compatible: value should be "hisilicon,hi6220-ade".
9 - reg: physical base address and length of the ADE controller's registers.
10 - hisilicon,noc-syscon: ADE NOC QoS syscon.
11 - resets: The ADE reset controller node.
12 - interrupt: the ldi vblank interrupt number used.
13 - clocks: a list of phandle + clock-specifier pairs, one for each entry
14 in clock-names.
15 - clock-names: should contain:
20 - assigned-clocks: Should contain "clk_ade_core" and "clk_codec_jpeg" clocks'
[all …]

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