| /linux/drivers/clk/at91/ |
| H A D | clk-usb.c | 38 u32 divisors[4]; member
316 if (usb->divisors[usbdiv]) in at91rm9200_clk_usb_recalc_rate()
317 return parent_rate / usb->divisors[usbdiv]; in at91rm9200_clk_usb_recalc_rate()
336 if (!usb->divisors[i]) in at91rm9200_clk_usb_round_rate()
339 tmp_parent_rate = rate * usb->divisors[i]; in at91rm9200_clk_usb_round_rate()
341 tmprate = DIV_ROUND_CLOSEST(tmp_parent_rate, usb->divisors[i]); in at91rm9200_clk_usb_round_rate()
373 if (usb->divisors[i] == div) { in at91rm9200_clk_usb_set_rate()
393 const char *parent_name, const u32 *divisors) in at91rm9200_clk_register_usb() argument
412 memcpy(usb->divisors, divisors, sizeof(usb->divisors)); in at91rm9200_clk_register_usb()
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| H A D | clk-master.c | 103 rate /= characteristics->divisors[div]; in clk_master_div_recalc_rate()
126 div = master->characteristics->divisors[div]; in clk_master_div_save_context()
147 div = master->characteristics->divisors[div]; in clk_master_div_restore_context()
172 for (i = 0; i < ARRAY_SIZE(characteristics->divisors); i++) { in clk_master_div_set()
173 if (!characteristics->divisors[i]) in clk_master_div_set()
176 if (div == characteristics->divisors[i]) in clk_master_div_set()
179 if (max_div < characteristics->divisors[i]) { in clk_master_div_set()
180 max_div = characteristics->divisors[i]; in clk_master_div_set()
197 rate /= characteristics->divisors[div_index]; in clk_master_div_set()
212 master->div = characteristics->divisors[div_index]; in clk_master_div_set()
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| H A D | dt-compat.c | 379 of_property_read_u32_array(np, "atmel,clk-divisors", in of_at91_clk_master_get_characteristics()
380 characteristics->divisors, 4); in of_at91_clk_master_get_characteristics()
993 u32 divisors[4] = {0, 0, 0, 0}; in of_at91rm9200_clk_usb_setup() local
1001 of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4); in of_at91rm9200_clk_usb_setup()
1002 if (!divisors[0]) in of_at91rm9200_clk_usb_setup()
1012 hw = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors); in of_at91rm9200_clk_usb_setup()
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| H A D | at91sam9260.c | 39 .divisors = { 1, 2, 4, 0 },
126 .divisors = { 1, 2, 4, 6 },
184 .divisors = { 1, 2, 4, 0 },
264 .divisors = { 1, 2, 4, 0 },
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| H A D | pmc.h | 53 u32 divisors[5]; member
287 const char *parent_name, const u32 *divisors);
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| /linux/sound/soc/codecs/ |
| H A D | max98925.c | 208 int divisors[3][2]; member
213 .divisors = { {1, 375}, {5, 1764}, {1, 384} }
218 .divisors = { {147, 40000}, {1, 256}, {147, 40960} }
223 .divisors = { {1, 250}, {5, 1176}, {1, 256} }
228 .divisors = { {2, 375}, {5, 882}, {1, 192} }
233 .divisors = { {147, 20000}, {1, 128}, {147, 20480} }
238 .divisors = { {1, 125}, {5, 588}, {1, 128} }
243 .divisors = { {4, 375}, {5, 441}, {1, 96} }
248 .divisors = { {147, 10000}, {1, 64}, {147, 10240} }
253 .divisors = { {2, 125}, {5, 294}, {1, 64} }
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| /linux/arch/sh/kernel/cpu/sh3/ |
| H A D | clock-sh7712.c | 19 static int divisors[] = { 1, 2, 3, 4, 6 }; variable
38 return clk->parent->rate / divisors[idx]; in module_clk_recalc()
50 return clk->parent->rate / divisors[idx]; in cpu_clk_recalc()
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| H A D | clock-sh7705.c | 23 * SH7705 uses the same divisors as the generic SH-3 case, it's just the
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| /linux/arch/sh/kernel/cpu/sh4a/ |
| H A D | clock-sh7722.c | 95 static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; variable
98 .divisors = divisors,
99 .nr_divisors = ARRAY_SIZE(divisors),
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| H A D | clock-sh7343.c | 89 static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; variable
92 .divisors = divisors,
93 .nr_divisors = ARRAY_SIZE(divisors),
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| H A D | clock-sh7366.c | 92 static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; variable
95 .divisors = divisors,
96 .nr_divisors = ARRAY_SIZE(divisors),
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| H A D | clock-sh7734.c | 54 static int divisors[] = { 1, 3, 2, 3, 4, 6, 8, 9, 12, 16, 18, 24 }; variable
57 .divisors = divisors,
58 .nr_divisors = ARRAY_SIZE(divisors),
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| H A D | clock-sh7723.c | 96 static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; variable
99 .divisors = divisors,
100 .nr_divisors = ARRAY_SIZE(divisors),
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| H A D | clock-sh7724.c | 136 static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 }; variable
139 .divisors = divisors,
140 .nr_divisors = ARRAY_SIZE(divisors),
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| /linux/drivers/clk/versatile/ |
| H A D | icst.c | 7 * Support functions for calculating clocks/divisors for the ICST307
20 * Divisors for each OD setting.
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| H A D | icst.h | 5 * Support functions for calculating clocks/divisors for the ICST
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| /linux/drivers/misc/ |
| H A D | ics932s401.c | 173 static const int divisors[] = {2, 3, 5, 15, 4, 6, 10, 30, 8, 12, 20, 60, 16, variable
189 freq /= divisors[data->regs[ICS932S401_REG_CPU_DIVISOR] >> in calculate_cpu_freq()
246 freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] & in calculate_src_freq()
294 freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] >> in calculate_pci_freq()
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| /linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| H A D | sdi.c | 171 * LCLK and PCLK divisors are located in shadow registers, and we in sdi_display_enable()
174 * is affected by the divisors. And as we need the PLL before enabling in sdi_display_enable()
175 * the output, we need to write the divisors early. in sdi_display_enable()
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| /linux/include/linux/ |
| H A D | ktime.h | 131 * Negative divisors could cause an inf loop, in ktime_divns()
149 * 32-bit implementation cannot handle negative divisors, in ktime_divns()
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| /linux/Documentation/hwmon/ |
| H A D | userspace-tools.rst | 33 4) fix sensors.conf, labels, limits, fan divisors
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| H A D | asb100.rst | 70 * Experiment with fan divisors > 8.
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| /linux/arch/arm/lib/ |
| H A D | lib1funcs.S | 73 @ For very big divisors, we must shift it a bit at a time, or
160 @ For very big divisors, we must shift it a bit at a time, or
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| /linux/drivers/video/fbdev/ |
| H A D | cyber2000fb.c | 68 * Clock divisors
70 u_int divisors[4]; member
670 new_pll = pll_ps / cfb->divisors[div2]; in cyber2000fb_decode_clock()
1414 cfb->divisors[0] = 1; in cyberpro_alloc_fb_info()
1415 cfb->divisors[1] = 2; in cyberpro_alloc_fb_info()
1416 cfb->divisors[2] = 4; in cyberpro_alloc_fb_info()
1419 cfb->divisors[3] = 8; in cyberpro_alloc_fb_info()
1421 cfb->divisors[3] = 6; in cyberpro_alloc_fb_info()
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| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | mvebu-uart.txt | 19 of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock
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| /linux/drivers/clk/renesas/ |
| H A D | rcar-gen2-cpg.c | 201 /* ADSP divisors */
247 /* SDHI divisors */
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