/freebsd/sys/contrib/device-tree/Bindings/auxdisplay/ |
H A D | hit,hd44780.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Hitachi HD44780 Character LCD Controller 10 - Geert Uytterhoeven <geert@linux-m68k.org> 13 The Hitachi HD44780 Character LCD Controller is commonly used on character 14 LCDs that can display one or more lines of text. It exposes an M6800 bus 15 interface, which can be used in either 4-bit or 8-bit mode. By using a 24 data-gpios: 26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
H A D | nvidia,tegra186-dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra186 (and later) Display Controller 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^display@[0-9a-f]+$" 19 - nvidia,tegra186-dc 20 - nvidia,tegra194-dc [all …]
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H A D | nvidia,tegra20-dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra Display Controller 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^dc@[0-9a-f]+$" 19 - enum: 20 - nvidia,tegra20-dc [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | dpu-msm8998.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dpu-msm8998.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DPU dt properties for MSM8998 target 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 20 - const: qcom,msm8998-mdss 25 reg-names: [all …]
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H A D | dpu-sc7180.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DPU dt properties for SC7180 target 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 20 - const: qcom,sc7180-mdss 25 reg-names: [all …]
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H A D | dpu-sc7280.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DPU dt properties for SC7280 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 19 const: qcom,sc7280-mdss 24 reg-names: [all …]
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H A D | dpu-sdm845.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DPU dt properties for SDM845 target 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 20 - const: qcom,sdm845-mdss 25 reg-names: [all …]
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H A D | dpu-qcm2290.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dpu-qcm2290.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DPU dt properties for QCM2290 target 10 - Loic Poulain <loic.poulain@linaro.org> 13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS 20 - const: qcom,qcm2290-mdss 25 reg-names: [all …]
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H A D | qcom,sc8280xp-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/ms [all...] |
H A D | qcom,mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Mobile Display SubSystem (MDSS) 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 11 - Rob Clark <robdclark@gmail.com> 14 This is the bindings documentation for the Mobile Display Subsystem(MDSS) that 15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc. 19 pattern: "^display-subsystem@[0-9a-f]+$" [all …]
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H A D | qcom,x1e80100-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,x1e80100-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm X1E80100 Display MDSS 10 - Abel Vesa <abel.vesa@linaro.org> 13 X1E80100 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 14 DPU display controller, DP interfaces, etc. 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,x1e80100-mdss [all …]
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H A D | qcom,sm6350-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6350-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SM6350 Display MDSS 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 SM6350 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 14 like DPU display controller, DSI and DP interfaces etc. 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6350-mdss [all …]
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H A D | qcom,sm6375-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SM6375 Display MDSS 10 - Konrad Dybcio <konradybcio@kernel.org> 13 SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 14 like DPU display controller, DSI and DP interfaces etc. 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6375-mdss [all …]
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H A D | qcom,qcm2290-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/ms [all...] |
H A D | qcom,sm6115-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/ms [all...] |
H A D | qcom,sc7180-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/ms [all...] |
/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | atmel,hlcdc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Atmel's HLCD Controller 10 - Nicolas Ferre <nicolas.ferre@microchip.com> 11 - Alexandre Belloni <alexandre.belloni@bootlin.com> 12 - Claudiu Beznea <claudiu.beznea@tuxon.dev> 15 The Atmel HLCDC (HLCD Controller) IP available on Atmel SoCs exposes two 16 subdevices, a PWM chip and a Display Controller. 21 - atmel,at91sam9n12-hlcdc [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/ |
H A D | xylon,logicvc-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Xylon LogiCVC display controller 11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com> 14 The Xylon LogiCVC is a display controller that supports multiple layers. 16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs. 18 Because the controller is intended for use in a FPGA, most of the 19 configuration of the controller takes place at logic configuration bitstream [all …]
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H A D | intel,keembay-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/intel,keembay-display.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intel Keem Bay display controller 10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com> 11 - Edmond J Dea <edmund.j.dea@intel.com> 15 const: intel,keembay-display 19 - description: LCD registers range 21 reg-names: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/atmel/ |
H A D | atmel,hlcdc-display-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/atmel/atmel,hlcdc-display-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Atmel's High LCD Controller (HLCDC) 10 - Nicolas Ferre <nicolas.ferre@microchip.com> 11 - Alexandre Belloni <alexandre.belloni@bootlin.com> 12 - Claudiu Beznea <claudiu.beznea@tuxon.dev> 15 The LCD Controller (LCDC) consists of logic for transferring LCD image 16 data from an external display buffer to a TFT LCD panel. The LCDC has one [all …]
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H A D | hlcdc-dc.txt | 1 Device-Tree bindings for Atmel's HLCDC (High LCD Controller) DRM driver 3 The Atmel HLCDC Display Controller is subdevice of the HLCDC MFD device. 4 See ../../mfd/atmel-hlcdc.txt for more details. 7 - compatible: value should be "atmel,hlcdc-display-controller" [all...] |
/freebsd/sys/contrib/device-tree/Bindings/display/panel/ |
H A D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Common Properties for Display Panel [all...] |
/freebsd/sys/contrib/device-tree/Bindings/display/exynos/ |
H A D | exynos_dp.txt | 1 The Exynos display port interface should be configured based on 5 -dp-controller node 6 -dptx-phy node(defined inside dp-controller node) 8 For the DP-PHY initialization, we use the dptx-phy node. 9 Required properties for dptx-phy: deprecated, use phys and phy-names 10 -reg: deprecated 12 -samsung,enable-mask: deprecated 13 The bit-mask used to enable/disable DP PHY. 15 For the Panel initialization, we read data from dp-controller node. 16 Required properties for dp-controller: [all …]
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H A D | exynos7-decon.txt | 1 Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON) 3 DECON (Display and Enhancement Controller) is the Display Controller for the 8 - compatible: value should be "samsung,exynos7-decon"; 10 - reg: physical base address and length of the DECON registers set. 12 - interrupts: should contain a list of all DECON IP block interrupts in the 14 format depends on the interrupt controller used. 16 - interrupt-names: should contain the interrupt names: "fifo", "vsync", 20 - pinctrl-0: pin control group to be used for this controller. 22 - pinctrl-names: must contain a "default" entry. 24 - clocks: must include clock specifiers corresponding to entries in the [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/samsung/ |
H A D | samsung,exynos7-decon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos7 SoC Display and Enhancement Controller (DECON) 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 16 DECON (Display and Enhancement Controller) is the Display Controller for the [all …]
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