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Searched +full:disable +full:- +full:cqe +full:- +full:dcmd (Results 1 – 6 of 6) sorted by relevance

/linux/include/linux/mmc/
H A Dhost.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
18 #include <linux/dma-direction.h>
19 #include <linux/blk-crypto-profile.h>
142 * ios->clock might be 0. For some controllers, setting 0Hz
144 * explicitly need to disable the clock. Otherwise e.g. voltage
152 * 1 for a read-only card
153 * -ENOSYS when not supported (equal to NULL callback)
162 * -ENOSYS when not supported (equal to NULL callback)
188 /* Optional callback to prepare for SD high-speed tuning */
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/linux/Documentation/devicetree/bindings/mmc/
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
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/linux/drivers/mmc/host/
H A Dcqhci-core.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
21 #include "cqhci-crypto.h"
43 return cq_host->desc_base + (tag * cq_host->slot_sz); in get_desc()
50 return desc + cq_host->task_desc_len; in get_link_desc()
55 return cq_host->trans_desc_len * cq_host->mmc->max_segs * tag; in get_trans_desc_offset()
62 return cq_host->trans_desc_dma_base + offset; in get_trans_desc_dma()
69 return cq_host->trans_desc_base + offset; in get_trans_desc()
80 memset(link_temp, 0, cq_host->link_desc_len); in setup_trans_desc()
81 if (cq_host->link_desc_len > 8) in setup_trans_desc()
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H A Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
28 #include "sdhci-cqhci.h"
29 #include "sdhci-pltfm.h"
30 #include "sdhci-esdhc.h"
82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
140 * open ended multi-blk IO. Otherwise the TC INT wouldn't
197 * disable the ACMD23 feature.
221 * struct esdhc_platform_data - platform data for esdhc on i.MX
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H A Dsdhci-of-arasan.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
9 * Based on sdhci-of-esdhc.c
18 #include <linux/clk-provider.h>
26 #include <linux/firmware/xlnx-zynqmp.h>
29 #include "sdhci-cqhci.h"
30 #include "sdhci-pltfm.h"
92 * On some SoCs the syscon area has a feature where the upper 16-bits of
93 * each 32-bit register act as a write mask for the lower 16-bits. This allows
101 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
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