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/linux/Documentation/devicetree/bindings/pci/
H A Dpci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/pci-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Kishon Vijay Abraham I <kishon@kernel.org>
14 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
18 pattern: "^pcie-ep@"
20 iommu-map:
21 $ref: /schemas/types.yaml#/definitions/uint32-matrix
24 - description: Device ID (see msi-map) base
[all …]
/linux/drivers/phy/broadcom/
H A Dphy-bcm-cygnus-pcie.c1 // SPDX-License-Identifier: GPL-2.0-only
24 * struct cygnus_pcie_phy - Cygnus PCIe PHY device
26 * @id: internal ID to identify the Cygnus PCIe PHY
27 * @phy: pointer to the kernel PHY device
31 enum cygnus_pcie_phy_id id; member
36 * struct cygnus_pcie_phy_core - Cygnus PCIe PHY core control
37 * @dev: pointer to device
38 * @base: base register
40 * @phys: pointer to Cygnus PHY device
43 struct device *dev;
[all …]
/linux/drivers/virtio/
H A Dvirtio_mmio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Virtio memory mapped device driver
5 * Copyright 2011-2014, ARM Ltd.
8 * platform device.
10 * The guest device(s) may be instantiated in one of three equivalent ways:
12 * 1. Static platform device in board's code, eg.:
15 * .name = "virtio-mmio",
16 * .id = -1,
31 * 2. Device Tree node, eg.:
39 * 3. Kernel module (or command line) parameter. Can be used more than once -
[all …]
/linux/drivers/pmdomain/bcm/
H A Dbcm-pmb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/soc/bcm-pmb.h>
70 struct device *dev;
71 void __iomem *base; member
79 int id; member
81 u8 device; member
90 static int bcm_pmb_bpcm_read(struct bcm_pmb *pmb, int bus, u8 device, in bcm_pmb_bpcm_read() argument
93 void __iomem *base = pmb->base + bus * 0x20; in bcm_pmb_bpcm_read() local
97 spin_lock_irqsave(&pmb->lock, flags); in bcm_pmb_bpcm_read()
98 err = bpcm_rd(base, device, offset, val); in bcm_pmb_bpcm_read()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv50.c34 struct nvkm_device *device = clk->base.subdev.device; in read_div() local
35 switch (device->chipset) { in read_div()
41 return nvkm_rd32(device, 0x004700); in read_div()
45 return nvkm_rd32(device, 0x004800); in read_div()
52 read_pll_src(struct nv50_clk *clk, u32 base) in read_pll_src() argument
54 struct nvkm_subdev *subdev = &clk->base.subdev; in read_pll_src()
55 struct nvkm_device *device = subdev->device; in read_pll_src() local
56 u32 coef, ref = nvkm_clk_read(&clk->base, nv_clk_src_crystal); in read_pll_src()
57 u32 rsel = nvkm_rd32(device, 0x00e18c); in read_pll_src()
58 int P, N, M, id; in read_pll_src() local
[all …]
/linux/drivers/cxl/core/
H A Dregs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/io-64-nonatomic-lo-hi.h>
4 #include <linux/device.h>
16 * CXL device capabilities are enumerated by PCI DVSEC (Designated
17 * Vendor-specific) and / or descriptors provided by platform firmware.
18 * They can be defined as a set like the device and component registers
19 * mandated by CXL Section 8.1.12.2 Memory Device PCIe Capabilities and
28 * cxl_probe_component_regs() - Detect CXL Component register blocks
29 * @dev: Host device of the @base mapping
30 * @base: Mapping containing the HDM Decoder Capability Header
[all …]
/linux/Documentation/driver-api/cxl/platform/
H A Dcdat.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Coherent Device Attribute Table (CDAT)
10 be enumerated at runtime (after device hotplug, for example).
13 DPA - Device Physical Address, used by the CXL device to denote the address
14 it supports for that device.
16 DSMADHandle - A device unique handle that is associated with a DPA range
21 Device Scoped Memory Affinity Structure (DSMAS)
24 The DSMAS contains information such as DSMADHandle, the DPA Base, and DPA
27 This table is used by Linux in conjunction with the Device Scoped Latency and
29 attributes of the CXL device itself.
[all …]
/linux/drivers/gpio/
H A Dgpio-f7188x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * GPIO driver for Fintek and Nuvoton Super-I/O chips
5 * Copyright (C) 2010-2013 LaCie
10 #define DRVNAME "gpio-f7188x"
21 * Super-I/O registers
23 #define SIO_LDSEL 0x07 /* Logical device select */
24 #define SIO_DEVID 0x20 /* Device ID (2 bytes) */
26 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
27 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
32 #define SIO_FINTEK_DEVREV 0x22 /* Fintek Device revision */
[all …]
/linux/drivers/mtd/devices/
H A Dmtd_intel_dg.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(c) 2019-2025, Intel Corporation. All rights reserved.
10 #include <linux/device.h>
13 #include <linux/io-64-nonatomic-lo-hi.h>
27 void __iomem *base; member
35 u8 id; member
49 * [15:0]-Erase size = 0x0010 4K 0x0080 32K 0x0100 64K
50 * [23:16]-Reserved
51 * [31:24]-Erase MEM RegionID
64 /* Flash Region Base Address */
[all …]
/linux/drivers/reset/
H A Dreset-npcm.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/reset-controller.h>
20 #include <soc/nuvoton/clock-npcm8xx.h>
96 struct device *dev;
97 void __iomem *base; member
109 writel(NPCM_SWRST << rc->sw_reset_number, rc->base + NPCM_SWRSTR); in npcm_rc_restart()
118 unsigned long id, bool set) in npcm_rc_setclear_reset() argument
121 unsigned int rst_bit = BIT(id & NPCM_MASK_RESETS); in npcm_rc_setclear_reset()
122 unsigned int ctrl_offset = id >> 8; in npcm_rc_setclear_reset()
126 spin_lock_irqsave(&rc->lock, flags); in npcm_rc_setclear_reset()
[all …]
/linux/drivers/watchdog/
H A Df71808e_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
21 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
22 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
23 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
25 #define SIO_REG_LDSEL 0x07 /* Logical device select */
26 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
27 #define SIO_REG_DEVREV 0x22 /* Device revision */
28 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
31 #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */
[all …]
/linux/include/uapi/linux/surface_aggregator/
H A Ddtx.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Surface DTX (clipboard detachment system driver) user-space interface.
5 * Definitions, structs, and IOCTLs for the /dev/surface/dtx misc device. This
6 * device allows user-space to control the clipboard detachment process on
9 * Copyright (C) 2020-2021 Maximilian Luz <luzmaximilian@gmail.com>
38 /* Base state values */
42 /* Runtime errors (non-critical) */
51 /* Base types */
58 #define SDTX_BASE_TYPE_HID(id) ((id) | SDTX_DEVICE_TYPE_HID) argument
59 #define SDTX_BASE_TYPE_SSH(id) ((id) | SDTX_DEVICE_TYPE_SSH) argument
[all …]
/linux/drivers/pci/hotplug/
H A Dcpqphp_pci.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
49 endp = (end - sizeof(struct hrt) + 1); in detect_HRT_floating_pointer()
80 if (func->pci_dev == NULL) in cpqhp_configure_device()
81 func->pci_dev = pci_get_domain_bus_and_slot(0, func->bus, in cpqhp_configure_device()
82 PCI_DEVFN(func->device, in cpqhp_configure_device()
83 func->function)); in cpqhp_configure_device()
85 /* No pci device, we need to create it then */ in cpqhp_configure_device()
86 if (func->pci_dev == NULL) { in cpqhp_configure_device()
89 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function)); in cpqhp_configure_device()
[all …]
/linux/drivers/scsi/aic7xxx/
H A Daic79xx_osm_pci.c4 * Copyright (c) 2000-2001 Adaptec Inc.
18 * 3. Neither the names of the above-listed copyright holders nor the names
39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
48 #define ID(x) \ macro
54 ID(ID_AHA_29320A),
55 ID(ID_AHA_29320ALP),
56 ID(ID_AHA_29320LPE),
58 ID(ID_AHA_29320),
59 ID(ID_AHA_29320B),
60 ID(ID_AHA_29320LP),
[all …]
H A Daic7xxx_osm_pci.c4 * Copyright (c) 2000-2001 Adaptec Inc.
18 * 3. Neither the names of the above-listed copyright holders nor the names
39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c#47 $
47 #define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI) macro
51 ID(ID_AHA_2902_04_10_15_20C_30C),
53 ID(ID_AHA_2930CU),
54 ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
55 ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
56 ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
57 ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
H A Dbusgf119.c24 #define gf119_i2c_bus(p) container_of((p), struct gf119_i2c_bus, base)
28 struct nvkm_i2c_bus base; member
33 gf119_i2c_bus_drive_scl(struct nvkm_i2c_bus *base, int state) in gf119_i2c_bus_drive_scl() argument
35 struct gf119_i2c_bus *bus = gf119_i2c_bus(base); in gf119_i2c_bus_drive_scl()
36 struct nvkm_device *device = bus->base.pad->i2c->subdev.device; in gf119_i2c_bus_drive_scl() local
37 nvkm_mask(device, bus->addr, 0x00000001, state ? 0x00000001 : 0); in gf119_i2c_bus_drive_scl()
41 gf119_i2c_bus_drive_sda(struct nvkm_i2c_bus *base, int state) in gf119_i2c_bus_drive_sda() argument
43 struct gf119_i2c_bus *bus = gf119_i2c_bus(base); in gf119_i2c_bus_drive_sda()
44 struct nvkm_device *device = bus->base.pad->i2c->subdev.device; in gf119_i2c_bus_drive_sda() local
45 nvkm_mask(device, bus->addr, 0x00000002, state ? 0x00000002 : 0); in gf119_i2c_bus_drive_sda()
[all …]
H A Dbusnv4e.c24 #define nv4e_i2c_bus(p) container_of((p), struct nv4e_i2c_bus, base)
28 struct nvkm_i2c_bus base; member
33 nv4e_i2c_bus_drive_scl(struct nvkm_i2c_bus *base, int state) in nv4e_i2c_bus_drive_scl() argument
35 struct nv4e_i2c_bus *bus = nv4e_i2c_bus(base); in nv4e_i2c_bus_drive_scl()
36 struct nvkm_device *device = bus->base.pad->i2c->subdev.device; in nv4e_i2c_bus_drive_scl() local
37 nvkm_mask(device, bus->addr, 0x2f, state ? 0x21 : 0x01); in nv4e_i2c_bus_drive_scl()
41 nv4e_i2c_bus_drive_sda(struct nvkm_i2c_bus *base, int state) in nv4e_i2c_bus_drive_sda() argument
43 struct nv4e_i2c_bus *bus = nv4e_i2c_bus(base); in nv4e_i2c_bus_drive_sda()
44 struct nvkm_device *device = bus->base.pad->i2c->subdev.device; in nv4e_i2c_bus_drive_sda() local
45 nvkm_mask(device, bus->addr, 0x1f, state ? 0x11 : 0x01); in nv4e_i2c_bus_drive_sda()
[all …]
H A Dbusnv04.c24 #define nv04_i2c_bus(p) container_of((p), struct nv04_i2c_bus, base)
30 struct nvkm_i2c_bus base; member
36 nv04_i2c_bus_drive_scl(struct nvkm_i2c_bus *base, int state) in nv04_i2c_bus_drive_scl() argument
38 struct nv04_i2c_bus *bus = nv04_i2c_bus(base); in nv04_i2c_bus_drive_scl()
39 struct nvkm_device *device = bus->base.pad->i2c->subdev.device; in nv04_i2c_bus_drive_scl() local
40 u8 val = nvkm_rdvgac(device, 0, bus->drive); in nv04_i2c_bus_drive_scl()
43 nvkm_wrvgac(device, 0, bus->drive, val | 0x01); in nv04_i2c_bus_drive_scl()
47 nv04_i2c_bus_drive_sda(struct nvkm_i2c_bus *base, int state) in nv04_i2c_bus_drive_sda() argument
49 struct nv04_i2c_bus *bus = nv04_i2c_bus(base); in nv04_i2c_bus_drive_sda()
50 struct nvkm_device *device = bus->base.pad->i2c->subdev.device; in nv04_i2c_bus_drive_sda() local
[all …]
H A Dbusnv50.c24 #define nv50_i2c_bus(p) container_of((p), struct nv50_i2c_bus, base)
30 struct nvkm_i2c_bus base; member
36 nv50_i2c_bus_drive_scl(struct nvkm_i2c_bus *base, int state) in nv50_i2c_bus_drive_scl() argument
38 struct nv50_i2c_bus *bus = nv50_i2c_bus(base); in nv50_i2c_bus_drive_scl()
39 struct nvkm_device *device = bus->base.pad->i2c->subdev.device; in nv50_i2c_bus_drive_scl() local
40 if (state) bus->data |= 0x01; in nv50_i2c_bus_drive_scl()
41 else bus->data &= 0xfe; in nv50_i2c_bus_drive_scl()
42 nvkm_wr32(device, bus->addr, bus->data); in nv50_i2c_bus_drive_scl()
46 nv50_i2c_bus_drive_sda(struct nvkm_i2c_bus *base, int state) in nv50_i2c_bus_drive_sda() argument
48 struct nv50_i2c_bus *bus = nv50_i2c_bus(base); in nv50_i2c_bus_drive_sda()
[all …]
/linux/sound/soc/amd/acp/
H A Dacp-i2s.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
21 #include <sound/soc-dai.h>
22 #include <linux/dma-mapping.h>
54 if (chip->tdm_mode) in acp_set_i2s_clk()
57 switch (chip->acp_rev) { in acp_set_i2s_clk()
62 val |= FIELD_PREP(ACP63_LRCLK_DIV_FIELD, chip->lrclk_div); in acp_set_i2s_clk()
63 val |= FIELD_PREP(ACP63_BCLK_DIV_FIELD, chip->bclk_div); in acp_set_i2s_clk()
66 val |= FIELD_PREP(LRCLK_DIV_FIELD, chip->lrclk_div); in acp_set_i2s_clk()
67 val |= FIELD_PREP(BCLK_DIV_FIELD, chip->bclk_div); in acp_set_i2s_clk()
69 writel(val, chip->base + i2s_clk_reg); in acp_set_i2s_clk()
[all …]
/linux/drivers/pmdomain/ti/
H A Domap_prm.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
6 * Tero Kristo <t-kristo@ti.com>
11 #include <linux/device.h>
19 #include <linux/reset-controller.h>
24 #include <linux/platform_data/ti-prm.h>
35 unsigned long statechange:1; /* Optional low-power state change */
40 struct device *dev;
56 u32 base; member
70 void __iomem *base; member
[all …]
/linux/sound/soc/intel/atom/sst/
H A Dsst_acpi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * sst_acpi.c - SST (LPE) driver init file for ACPI enumeration.
23 #include <sound/intel-dsp-config.h>
31 #include <sound/soc-acpi.h>
32 #include <sound/soc-acpi-intel-match.h>
33 #include "../sst-mfld-platform.h"
34 #include "../../common/soc-intel-quirks.h"
128 /* For "LPE0F28" ACPI device found on some Android factory OS models */
155 .platform = "sst-mfld-platform",
167 .platform = "sst-mfld-platform",
[all …]
/linux/drivers/clk/
H A Dclk-en7523.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/clk-provider.h>
10 #include <linux/reset-controller.h>
11 #include <dt-bindings/clock/en7523-clk.h>
12 #include <dt-bindings/reset/airoha,en7581-reset.h>
46 int id; member
66 void __iomem *base; member
73 void __iomem *base; member
98 .id = EN7523_CLK_GSW,
112 .id = EN7523_CLK_EMI,
[all …]
/linux/drivers/iio/dac/
H A Dcio-dac.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IIO driver for the Measurement Computing CIO-DAC
6 * This driver supports the following Measurement Computing devices: CIO-DAC16,
7 * CIO-DAC08, and PC104-DAC06.
10 #include <linux/device.h>
32 static unsigned int base[max_num_isa_dev(CIO_DAC_EXTENT)]; variable
34 module_param_hw_array(base, uint, ioport, &num_cio_dac, 0);
35 MODULE_PARM_DESC(base, "Measurement Computing CIO-DAC base addresses");
40 static bool cio_dac_precious_reg(struct device *dev, unsigned int reg) in cio_dac_precious_reg()
44 * the device, then no update occurs until a DAC register is read. in cio_dac_precious_reg()
[all …]
/linux/drivers/irqchip/
H A Dirq-vic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 1999 - 2003 ARM Limited
21 #include <linux/device.h>
23 #include <linux/irqchip/arm-vic.h>
49 * struct vic_device - VIC PM device
50 * @base: The register base for the VIC.
51 * @irq: The IRQ number for the base of the VIC.
62 void __iomem *base; member
82 * vic_init2 - common initialisation code
83 * @base: Base of the VIC.
[all …]

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