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/linux/drivers/spi/
H A Dspi-qcom-qspi.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
6 #include <linux/dma-mapping.h>
17 #include <linux/spi/spi-mem.h>
160 * Number of entries in sgt returned from spi framework that-
169 struct device *dev; member
183 static u32 qspi_buswidth_to_iomode(struct qcom_qspi *ctrl, in qspi_buswidth_to_iomode() argument
194 dev_warn_once(ctrl->dev, in qspi_buswidth_to_iomode()
200 static void qcom_qspi_pio_xfer_cfg(struct qcom_qspi *ctrl) in qcom_qspi_pio_xfer_cfg() argument
206 xfer = &ctrl->xfer; in qcom_qspi_pio_xfer_cfg()
[all …]
/linux/drivers/soundwire/
H A Dqcom.c1 // SPDX-License-Identifier: GPL-2.0
107 #define SWRM_DPn_PORT_CTRL_BANK(offset, n, m) (offset + 0x100 * (n - 1) + 0x40 * m)
108 #define SWRM_DPn_PORT_CTRL_2_BANK(offset, n, m) (offset + 0x100 * (n - 1) + 0x40 * m)
109 #define SWRM_DPn_BLOCK_CTRL_1(offset, n) (offset + 0x100 * (n - 1))
110 #define SWRM_DPn_BLOCK_CTRL2_BANK(offset, n, m) (offset + 0x100 * (n - 1) + 0x40 * m)
111 #define SWRM_DPn_PORT_HCTRL_BANK(offset, n, m) (offset + 0x100 * (n - 1) + 0x40 * m)
112 #define SWRM_DPn_BLOCK_CTRL3_BANK(offset, n, m) (offset + 0x100 * (n - 1) + 0x40 * m)
113 #define SWRM_DPn_SAMPLECTRL2_BANK(offset, n, m) (offset + 0x100 * (n - 1) + 0x40 * m)
130 #define SWRM_REG_VAL_PACK(data, dev, id, reg) \ argument
131 ((reg) | ((id) << 16) | ((dev) << 20) | ((data) << 24))
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/linux/drivers/nvme/host/
H A Dsysfs.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2011-2014, Intel Corporation.
8 #include <linux/nvme-auth.h>
14 static ssize_t nvme_sysfs_reset(struct device *dev, in nvme_sysfs_reset() argument
18 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); in nvme_sysfs_reset() local
21 ret = nvme_reset_ctrl_sync(ctrl); in nvme_sysfs_reset()
28 static ssize_t nvme_sysfs_rescan(struct device *dev, in nvme_sysfs_rescan() argument
32 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); in nvme_sysfs_rescan() local
34 nvme_queue_scan(ctrl); in nvme_sysfs_rescan()
39 static ssize_t nvme_adm_passthru_err_log_enabled_show(struct device *dev, in nvme_adm_passthru_err_log_enabled_show() argument
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H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2011-2014, Intel Corporation.
10 #include <linux/blk-mq-dma.h>
11 #include <linux/blk-integrity.h>
25 #include <linux/t10-pi.h>
27 #include <linux/io-64-nonatomic-lo-hi.h>
28 #include <linux/io-64-nonatomic-hi-lo.h>
29 #include <linux/sed-opal.h>
34 #define SQ_SIZE(q) ((q)->q_depth << (q)->sqes)
35 #define CQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_completion))
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H A Drdma.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
14 #include <linux/blk-mq.h>
15 #include <linux/blk-integrity.h>
26 #include <linux/nvme-rdma.h>
50 struct ib_device *dev; member
97 struct nvme_rdma_ctrl *ctrl; member
139 struct nvme_ctrl ctrl; member
144 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) in to_rdma_ctrl() argument
146 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); in to_rdma_ctrl()
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H A Dfc.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/blk-cgroup.h>
15 #include <linux/nvme-fc-driver.h>
16 #include <linux/nvme-fc.h>
35 struct nvme_fc_ctrl *ctrl; member
36 struct device *dev; member
65 struct list_head lsreq_list; /* rport->ls_req_list */
77 struct list_head lsrcv_list; /* rport->ls_rcv_list */
99 struct nvme_fc_ctrl *ctrl; member
124 struct device *dev; /* physical device for dma */ member
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H A Dmultipath.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 Christoph Hellwig.
6 #include <linux/backing-dev.h>
18 bool *arg = kp->arg; in multipath_param_set()
27 return -EINVAL; in multipath_param_set()
46 bool *arg = kp->arg; in multipath_always_on_set()
66 …"create multipath node always except for private namespace with non-unique nsid; note that this al…
70 [NVME_IOPOLICY_RR] = "round-robin",
71 [NVME_IOPOLICY_QD] = "queue-depth",
84 return -EINVAL; in nvme_iopolicy_parse()
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/linux/drivers/slimbus/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2011-2017, The Linux Foundation
22 while (id->manf_id != 0 || id->prod_code != 0) { in slim_match()
23 if (id->manf_id == sbdev->e_addr.manf_id && in slim_match()
24 id->prod_code == sbdev->e_addr.prod_code && in slim_match()
25 id->dev_index == sbdev->e_addr.dev_index && in slim_match()
26 id->instance == sbdev->e_addr.instance) in slim_match()
33 static int slim_device_match(struct device *dev, const struct device_driver *drv) in slim_device_match() argument
35 struct slim_device *sbdev = to_slim_device(dev); in slim_device_match()
39 if (of_driver_match_device(dev, drv)) in slim_device_match()
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/linux/drivers/spmi/
H A Dspmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
16 #include <dt-bindings/spmi/spmi.h>
23 static void spmi_dev_release(struct device *dev) in spmi_dev_release() argument
25 struct spmi_device *sdev = to_spmi_device(dev); in spmi_dev_release()
34 static void spmi_ctrl_release(struct device *dev) in spmi_ctrl_release() argument
36 struct spmi_controller *ctrl = to_spmi_controller(dev); in spmi_ctrl_release() local
38 ida_free(&ctrl_ida, ctrl->nr); in spmi_ctrl_release()
39 kfree(ctrl); in spmi_ctrl_release()
46 static int spmi_device_match(struct device *dev, const struct device_driver *drv) in spmi_device_match() argument
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/linux/drivers/pmdomain/marvell/
H A Dpxa1908-power-controller.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <dt-bindings/power/marvell,pxa1908-power.h>
42 struct device *dev; member
55 struct pxa1908_pd_ctrl *ctrl; member
62 struct pxa1908_pd_ctrl *ctrl = pd->ctrl; in pxa1908_pd_is_on() local
64 switch (pd->data.id) { in pxa1908_pd_is_on()
66 return regmap_test_bits(ctrl->base, APMU_AUDIO_CLK, AUDIO_ULCX_ENABLE); in pxa1908_pd_is_on()
68 return regmap_test_bits(ctrl->base, APMU_DEBUG, DSI_PHY_DVM_MASK); in pxa1908_pd_is_on()
70 return regmap_test_bits(ctrl->base, APMU_PWR_STATUS_REG, pd->data.pwr_state); in pxa1908_pd_is_on()
77 const struct pxa1908_pd_data *data = &pd->data; in pxa1908_pd_power_on()
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/linux/drivers/watchdog/
H A Drealtek_otto_wdt.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * - Base prescale of (2 << 25), providing tick duration T_0: 168ms @ 200MHz
11 * - PRESCALE: logarithmic prescaler adding a factor of {1, 2, 4, 8}
12 * - Phase 1: Times out after (PHASE1 + 1) × PRESCALE × T_0
14 * - Phase 2: starts after phase 1, times out after (PHASE2 + 1) × PRESCALE × T_0
68 struct device *dev; member
76 struct otto_wdt_ctrl *ctrl = watchdog_get_drvdata(wdev); in otto_wdt_start() local
78 regmap_set_bits(ctrl->regmap, OTTO_WDT_REG_CTRL, OTTO_WDT_CTRL_ENABLE); in otto_wdt_start()
84 struct otto_wdt_ctrl *ctrl = watchdog_get_drvdata(wdev); in otto_wdt_stop() local
86 regmap_clear_bits(ctrl->regmap, OTTO_WDT_REG_CTRL, in otto_wdt_stop()
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/linux/drivers/mtd/nand/raw/
H A Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de>
10 #include <linux/dma-mapping.h>
34 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20)
40 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4)
41 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0)
156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off))
171 struct device *dev; member
207 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc()
211 return -ERANGE; in tegra_nand_ooblayout_rs_ecc()
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/linux/drivers/gpio/
H A Dgpio-ath79.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
7 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
45 static u32 ath79_gpio_read(struct ath79_gpio_ctrl *ctrl, unsigned reg) in ath79_gpio_read() argument
47 return readl(ctrl->base + reg); in ath79_gpio_read()
50 static void ath79_gpio_write(struct ath79_gpio_ctrl *ctrl, in ath79_gpio_write() argument
53 writel(val, ctrl->base + reg); in ath79_gpio_write()
57 struct ath79_gpio_ctrl *ctrl, unsigned reg, u32 mask, u32 bits) in ath79_gpio_update_bits() argument
61 old_val = ath79_gpio_read(ctrl, reg); in ath79_gpio_update_bits()
65 ath79_gpio_write(ctrl, reg, new_val); in ath79_gpio_update_bits()
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H A Dgpio-idt3243x.c1 // SPDX-License-Identifier: GPL-2.0
30 struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc); in idt_gpio_dispatch() local
37 pending = readl(ctrl->pic + IDT_PIC_IRQ_PEND); in idt_gpio_dispatch()
38 pending &= ~ctrl->mask_cache; in idt_gpio_dispatch()
39 for_each_set_bit(bit, &pending, gc->ngpio) { in idt_gpio_dispatch()
40 virq = irq_find_mapping(gc->irq.domain, bit); in idt_gpio_dispatch()
51 struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc); in idt_gpio_irq_set_type() local
57 return -EINVAL; in idt_gpio_irq_set_type()
59 guard(gpio_generic_lock_irqsave)(&ctrl->chip); in idt_gpio_irq_set_type()
61 ilevel = readl(ctrl->gpio + IDT_GPIO_ILEVEL); in idt_gpio_irq_set_type()
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H A Dgpio-en7523.c1 // SPDX-License-Identifier: GPL-2.0-only
15 * struct airoha_gpio_ctrl - Airoha GPIO driver data
32 struct airoha_gpio_ctrl *ctrl = gpiochip_get_data(gc); in airoha_dir_set() local
33 u32 dir = ioread32(ctrl->dir[gpio / 16]); in airoha_dir_set()
34 u32 output = ioread32(ctrl->output); in airoha_dir_set()
45 iowrite32(dir, ctrl->dir[gpio / 16]); in airoha_dir_set()
48 gpio_generic_chip_set(&ctrl->gen_gc, gpio, val); in airoha_dir_set()
50 iowrite32(output, ctrl->output); in airoha_dir_set()
68 struct airoha_gpio_ctrl *ctrl = gpiochip_get_data(gc); in airoha_get_dir() local
69 u32 dir = ioread32(ctrl->dir[gpio / 16]); in airoha_get_dir()
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H A Dgpio-realtek-otto.c1 // SPDX-License-Identifier: GPL-2.0-only
42 * struct realtek_gpio_ctrl - Realtek Otto GPIO driver data
46 * @cpumask_base: Base address of the per-CPU interrupt mask registers
51 * @bank_read: Read a bank setting as a single 32-bit value
52 * @bank_write: Write a bank setting as a single 32-bit value
55 * The DIR, DATA, and ISR registers consist of four 8-bit port values, packed
56 * into a single 32-bit register. Use @bank_read (@bank_write) to get (assign)
57 * a value from (to) these registers. The IMR register consists of four 16-bit
58 * port values, packed into two 32-bit registers. Use @imr_line_pos to get the
59 * bit shift of the 2-bit field for a line's IMR settings. Shifts larger than
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/linux/sound/soc/atmel/
H A Dmchp-spdiftx.c1 // SPDX-License-Identifier: GPL-2.0
22 * ---- S/PDIF Transmitter Controller Register map ----
39 * ---- Control Register (Write-only) ----
45 * ---- Mode Register (Read/Write) ----
92 * ---- Interrupt Enable/Disable/Mask/Status Register (Write/Read-only) ----
107 static bool mchp_spdiftx_readable_reg(struct device *dev, unsigned int reg) in mchp_spdiftx_readable_reg() argument
131 static bool mchp_spdiftx_writeable_reg(struct device *dev, unsigned int reg) in mchp_spdiftx_writeable_reg() argument
157 static bool mchp_spdiftx_precious_reg(struct device *dev, unsigned int reg) in mchp_spdiftx_precious_reg() argument
193 struct device *dev; member
201 static inline int mchp_spdiftx_is_running(struct mchp_spdiftx_dev *dev) in mchp_spdiftx_is_running() argument
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/linux/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2010-2015 Broadcom Corporation
17 #include <linux/dma-mapping.h>
241 struct device *dev; member
263 /* List of NAND hosts (one for each chip-select) */
272 /* EDU info, per-transaction */
293 /* in-memory cache of the FLASH_CACHE, used only for some commands */
299 const u8 *cs_offsets; /* within each chip-select */
310 /* for low-power standby/resume only */
330 /* use for low-power standby/resume only */
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/linux/drivers/nvme/target/
H A Dpci-epf.c1 // SPDX-License-Identifier: GPL-2.0
7 * REDS Institute, HEIG-VD, HES-SO, Switzerland
19 #include <linux/pci-epc.h>
20 #include <linux/pci-epf.h>
31 * allow up to 128 page-sized segments. For the maximum allowed,
36 (NVMET_PCI_EPF_MAX_SEGS << (PAGE_SHIFT - 10))
84 struct nvmet_pci_epf_ctrl *ctrl; member
129 struct nvmet_pci_epf_ctrl *ctrl; member
162 struct device *dev; member
209 struct nvmet_pci_epf_ctrl ctrl; member
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/linux/drivers/memory/
H A Dfsl_ifc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 * convert_ifc_address - convert the base address
39 * fsl_ifc_find - find IFC bank
51 if (!fsl_ifc_ctrl_dev || !fsl_ifc_ctrl_dev->gregs) in fsl_ifc_find()
52 return -ENODEV; in fsl_ifc_find()
54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find()
55 u32 cspr = ifc_in32(&fsl_ifc_ctrl_dev->gregs->cspr_cs[i].cspr); in fsl_ifc_find()
62 return -ENOENT; in fsl_ifc_find()
66 static int fsl_ifc_ctrl_init(struct fsl_ifc_ctrl *ctrl) in fsl_ifc_ctrl_init() argument
68 struct fsl_ifc_global __iomem *ifc = ctrl->gregs; in fsl_ifc_ctrl_init()
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/linux/arch/powerpc/sysdev/
H A Dfsl_lbc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright © 2007-2008 MontaVista Software, Inc.
10 * Author: Roy Zang <tie-fei.zang@freescale.com>
35 * fsl_lbc_addr - convert the base address
45 struct device_node *np = fsl_lbc_ctrl_dev->dev->of_node; in fsl_lbc_addr()
56 * fsl_lbc_find - find Localbus bank
69 if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs) in fsl_lbc_find()
70 return -ENODEV; in fsl_lbc_find()
72 lbc = fsl_lbc_ctrl_dev->regs; in fsl_lbc_find()
73 for (i = 0; i < ARRAY_SIZE(lbc->bank); i++) { in fsl_lbc_find()
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/linux/drivers/rtc/
H A Drtc-mpfs.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2021-2022 Microchip Corporation. All rights reserved.
63 u32 ctrl; in mpfs_rtc_start() local
65 ctrl = readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_start()
66 ctrl &= ~CONTROL_STOP_BIT; in mpfs_rtc_start()
67 ctrl |= CONTROL_START_BIT; in mpfs_rtc_start()
68 writel(ctrl, rtcdev->base + CONTROL_REG); in mpfs_rtc_start()
73 u32 val = readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_clear_irq()
77 writel(val, rtcdev->base + CONTROL_REG); in mpfs_rtc_clear_irq()
83 (void)readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_clear_irq()
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/linux/drivers/pci/hotplug/
H A Dpciehp_pci.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
8 * Copyright (C) 2003-2004 Intel Corporation
25 * pciehp_configure_device() - enumerate PCI devices below a hotplug bridge
26 * @ctrl: PCIe hotplug controller
29 * Return 0 on success, %-EEXIST if the devices are already enumerated or
30 * %-ENODEV if enumeration failed.
32 int pciehp_configure_device(struct controller *ctrl) in pciehp_configure_device() argument
34 struct pci_dev *dev; in pciehp_configure_device() local
35 struct pci_dev *bridge = ctrl->pcie->port; in pciehp_configure_device()
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/linux/drivers/comedi/drivers/
H A Dcomedi_parport.c1 // SPDX-License-Identifier: GPL-2.0+
9 * COMEDI - Linux Control and Measurement Device Interface
19 * Updated: Tue, 30 Apr 2002 21:11:45 -0700
32 * ----- ------ ---- ---- --------------
50 * 18-25 ground
71 static int parport_data_reg_insn_bits(struct comedi_device *dev, in parport_data_reg_insn_bits() argument
77 outb(s->state, dev->iobase + PARPORT_DATA_REG); in parport_data_reg_insn_bits()
79 data[1] = inb(dev->iobase + PARPORT_DATA_REG); in parport_data_reg_insn_bits()
81 return insn->n; in parport_data_reg_insn_bits()
84 static int parport_data_reg_insn_config(struct comedi_device *dev, in parport_data_reg_insn_config() argument
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/linux/drivers/power/reset/
H A Dqemu-virt-ctrl.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2026 Kuan-Wei Chiu <visitorckw@gmail.com>
38 struct qemu_virt_ctrl *ctrl = data->cb_data; in qemu_virt_ctrl_power_off() local
40 virt_ctrl_write32(CMD_HALT, ctrl->base + VIRT_CTRL_REG_CMD); in qemu_virt_ctrl_power_off()
47 struct qemu_virt_ctrl *ctrl = data->cb_data; in qemu_virt_ctrl_restart() local
49 virt_ctrl_write32(CMD_RESET, ctrl->base + VIRT_CTRL_REG_CMD); in qemu_virt_ctrl_restart()
57 struct qemu_virt_ctrl *ctrl = container_of(nb, struct qemu_virt_ctrl, reboot_nb); in qemu_virt_ctrl_reboot_notify() local
60 virt_ctrl_write32(CMD_HALT, ctrl->base + VIRT_CTRL_REG_CMD); in qemu_virt_ctrl_reboot_notify()
67 struct qemu_virt_ctrl *ctrl; in qemu_virt_ctrl_probe() local
70 ctrl = devm_kzalloc(&pdev->dev, sizeof(*ctrl), GFP_KERNEL); in qemu_virt_ctrl_probe()
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