/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | nvidia,tegra124-emc.yaml | 13 description: | 26 - description: external memory clock 37 description: 42 description: 46 description: 57 description: 66 description: 73 description: 79 description: 85 description: [all …]
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H A D | nvidia,tegra30-emc.yaml | 14 description: | 39 description: 44 description: 48 description: 58 description: 66 description: 72 description: 80 description: 85 description: 90 description: [all …]
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H A D | nvidia,tegra20-emc.yaml | 14 description: | 45 description: 50 description: 54 description: 60 description: 71 description: 78 description: 83 description: 89 - description: EMC_RC 90 - description: EMC_RFC [all …]
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H A D | ti,gpmc-child.yaml | 13 description: 25 description: Minimum clock period for synchronous mode 30 description: Assertion time 34 description: Read deassertion time 38 description: Write deassertion time 43 description: Assertion time 47 description: Read deassertion time 51 description: Write deassertion time 55 description: Assertion time for AAD 59 description: Read deassertion time for AAD [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | st,stm32mp25-rcc.yaml | 12 description: | 36 - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz) 37 - description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz) 38 - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz) 39 - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz) 40 - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz) 41 - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (coud be gated) 42 - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock 43 - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock 44 - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock [all …]
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H A D | qcom,mmcc.yaml | 13 description: | 54 description: 58 description: 82 - description: Board PXO source 83 - description: PLL 3 clock 84 - description: PLL 3 Vote clock 85 - description: DSI phy instance 1 dsi clock 86 - description: DSI phy instance 1 byte clock 87 - description: DSI phy instance 2 dsi clock 88 - description: DSI phy instance 2 byte clock [all …]
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H A D | fsl,imx8-acm.yaml | 12 description: | 32 description: 64 - description: power domain of IMX_SC_R_AUDIO_CLK_0 65 - description: power domain of IMX_SC_R_AUDIO_CLK_1 66 - description: power domain of IMX_SC_R_MCLK_OUT_0 67 - description: power domain of IMX_SC_R_MCLK_OUT_1 68 - description: power domain of IMX_SC_R_AUDIO_PLL_0 69 - description: power domain of IMX_SC_R_AUDIO_PLL_1 70 - description: power domain of IMX_SC_R_ASRC_0 71 - description: power domain of IMX_SC_R_ASRC_1 [all …]
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H A D | qcom,gcc-sc8280xp.yaml | 12 description: | 24 - description: XO reference clock 25 - description: Sleep clock 26 - description: UFS memory first RX symbol clock 27 - description: UFS memory second RX symbol clock 28 - description: UFS memory first TX symbol clock 29 - description: UFS card first RX symbol clock 30 - description: UFS card second RX symbol clock 31 - description: UFS card first TX symbol clock 32 - description: Primary USB SuperSpeed pipe clock [all …]
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H A D | samsung,exynos850-clock.yaml | 16 description: | 73 - description: External reference clock (26 MHz) 89 - description: External reference clock (26 MHz) 90 - description: CMU_APM bus clock (from CMU_TOP) 107 - description: External reference clock (26 MHz) 108 - description: AUD clock (from CMU_TOP) 125 - description: External reference clock (26 MHz) 126 - description: CMU_CMGP bus clock (from CMU_APM) 143 - description: External reference clock (26 MHz) 144 - description: CMU_CORE bus clock (from CMU_TOP) [all …]
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/linux/Documentation/devicetree/bindings/net/wireless/ |
H A D | qcom,ath11k.yaml | 14 description: | 38 description: 47 description: 54 description: 66 description: | 74 description: State bits used by the AP to signal the WLAN Q6. 76 - description: Signal bits used to enable/disable low power mode 80 description: The names of the state bits used for SMP2P output. 105 - description: misc-pulse1 interrupt events 106 - description: misc-latch interrupt events [all …]
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/linux/Documentation/devicetree/bindings/sound/ |
H A D | mediatek,mt2701-audio.yaml | 9 description: 23 - description: AFE interrupt 24 - description: ASYS interrupt 36 - description: audio infra sys clock 37 - description: top audio mux 1 38 - description: top audio mux 2 39 - description: top audio sys a1 clock 40 - description: top audio sys a2 clock 41 - description: i2s0 source selection 42 - description: i2s1 source selection [all …]
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/linux/Documentation/ABI/testing/ |
H A D | sysfs-class-hwmon | 2 Description: 13 Description: 21 Description: 31 Description: 39 Description: 51 Description: 59 Description: 71 Description: 93 Description: 101 Description: [all …]
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/linux/Documentation/netlink/ |
H A D | netlink-raw.yaml | 19 description: Specification of a raw netlink protocol 25 description: Name of the netlink family. 30 description: Schema compatibility level. 34 description: Protocol number to use for netlink-raw 38 description: Path to the uAPI header, default is linux/${family-name}.h 42 description: Name of the define for the family name. 45 description: Name of the define for the version of the family. 48 …description: Makes the number of attributes and commands be specified by a define, not an enum val… 51 description: Name of the define for the last operation in the list. 54 … description: The explicit name for constant holding the count of operations (last operation + 1). [all …]
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H A D | genetlink-legacy.yaml | 24 description: Specification of a genetlink protocol 30 description: Name of the genetlink family. 35 description: Schema compatibility level. Default is "genetlink". 38 description: Path to the uAPI header, default is linux/${family-name}.h 42 description: Name of the define for the family name. 45 description: Name of the define for the version of the family. 48 …description: Makes the number of attributes and commands be specified by a define, not an enum val… 51 description: Name of the define for the last operation in the list. 54 … description: The explicit name for constant holding the count of operations (last operation + 1). 59 description: | [all …]
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H A D | genetlink-c.yaml | 24 description: Specification of a genetlink protocol 30 description: Name of the genetlink family. 35 description: Schema compatibility level. Default is "genetlink". 38 description: Path to the uAPI header, default is linux/${family-name}.h 42 description: Name of the define for the family name. 45 description: Name of the define for the version of the family. 48 …description: Makes the number of attributes and commands be specified by a define, not an enum val… 51 description: Name of the define for the last operation in the list. 54 … description: The explicit name for constant holding the count of operations (last operation + 1). 59 description: List of type and constant definitions (enums, flags, defines). [all …]
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H A D | genetlink.yaml | 24 description: Specification of a genetlink protocol 30 description: Name of the genetlink family. 35 description: Schema compatibility level. Default is "genetlink". 38 description: Path to the uAPI header, default is linux/${family-name}.h 42 description: List of type and constant definitions (enums, flags, defines). 52 description: For C-compatible languages, header which already defines this value. 60 description: For const - the value. 64 description: For enum or flags the literal initializer for the first value. 67 description: For enum or flags array of values. 83 description: Render the max members for this enum. [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | pinctrl-single.yaml | 12 description: 52 description: 58 description: Optional flag to indicate register controls more than one pin 62 description: Mask of the allowed register bits 66 description: Optional function off mode for disabled state 70 description: Width of pin specific bits in the register 75 description: Optional list of pin base, nr pins & gpio function 79 - description: phandle of a gpio-range node 80 - description: pin base 81 - description: number of pins [all …]
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H A D | nvidia,tegra-pinmux-common.yaml | 13 description: | 47 description: An array of strings. Each string contains the name of a pin 52 description: A string containing the name of the function to mux to the 57 description: Pull-down/up setting to apply to the pin. 60 - description: none 62 - description: down 64 - description: up 68 description: Tristate setting to apply to the pin. 71 - description: drive 73 - description: tristate [all …]
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,sc7280-mss-pil.yaml | 12 description: 23 - description: MSS QDSP6 registers 24 - description: RMB registers 33 - description: MSA Stream 1 34 - description: MSA Stream 2 38 - description: Path leading to system memory 42 - description: Watchdog interrupt 43 - description: Fatal interrupt 44 - description: Ready interrupt 45 - description: Handover interrupt [all …]
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H A D | qcom,sc7180-mss-pil.yaml | 12 description: 23 - description: MSS QDSP6 registers 24 - description: RMB registers 33 - description: MSA Stream 1 34 - description: MSA Stream 2 38 - description: Watchdog interrupt 39 - description: Fatal interrupt 40 - description: Ready interrupt 41 - description: Handover interrupt 42 - description: Stop acknowledge interrupt [all …]
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/linux/Documentation/devicetree/bindings/display/ |
H A D | renesas,du.yaml | 12 description: | 52 description: Interrupt specifiers, one per DU channel 61 description: | 82 description: 90 - description: phandle to VSP instance that serves the DU channel 91 - description: Channel index identifying the LIF instance in that VSP 92 description: 114 - description: Functional clock 115 - description: DU_DOTCLKIN0 input clock 116 - description: DU_DOTCLKIN1 input clock [all …]
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | renesas,rzg2l-irqc.yaml | 13 description: | 36 description: The first cell should contain a macro RZG2L_{NMI,IRQX} included in the 52 - description: NMI interrupt 53 - description: IRQ0 interrupt 54 - description: IRQ1 interrupt 55 - description: IRQ2 interrupt 56 - description: IRQ3 interrupt 57 - description: IRQ4 interrupt 58 - description: IRQ5 interrupt 59 - description: IRQ6 interrupt [all …]
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/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | gmu.yaml | 14 description: | 49 - description: GMU HFI interrupt 50 - description: GMU interrupt 59 - description: CX power domain 60 - description: GX power domain 72 description: Reference to the AOSS side-channel message RAM 100 - description: Core GMU registers 101 - description: GMU PDC registers 102 - description: GMU PDC sequence registers 110 - description: GMU clock [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | snps,dw-pcie-common.yaml | 13 description: 21 description: 43 description: 62 description: 76 - description: 81 - description: 85 - description: 89 - description: 93 - description: 97 - description: [all …]
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/linux/Documentation/devicetree/bindings/cache/ |
H A D | qcom,llcc.yaml | 12 description: | 53 - description: Reference to an nvmem node for multi channel DDR 76 - description: LLCC0 base register region 77 - description: LLCC broadcast base register region 93 - description: LLCC0 base register region 94 - description: LLCC1 base register region 95 - description: LLCC2 base register region 96 - description: LLCC3 base register region 97 - description: LLCC4 base register region 98 - description: LLCC5 base register region [all …]
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