1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Socionext UniPhier AHCI PHY 8 9description: | 10 This describes the deivcetree bindings for PHY interfaces built into 11 AHCI controller implemented on Socionext UniPhier SoCs. 12 13maintainers: 14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 15 16properties: 17 compatible: 18 enum: 19 - socionext,uniphier-pro4-ahci-phy 20 - socionext,uniphier-pxs2-ahci-phy 21 - socionext,uniphier-pxs3-ahci-phy 22 23 reg: 24 maxItems: 1 25 26 "#phy-cells": 27 const: 0 28 29 clocks: 30 minItems: 1 31 maxItems: 2 32 33 clock-names: 34 minItems: 1 35 maxItems: 6 36 37 resets: 38 minItems: 2 39 maxItems: 6 40 41 reset-names: 42 minItems: 2 43 maxItems: 6 44 45allOf: 46 - if: 47 properties: 48 compatible: 49 contains: 50 const: socionext,uniphier-pro4-ahci-phy 51 then: 52 properties: 53 clocks: 54 minItems: 2 55 maxItems: 2 56 clock-names: 57 items: 58 - const: link 59 - const: gio 60 resets: 61 minItems: 6 62 maxItems: 6 63 reset-names: 64 items: 65 - const: link 66 - const: gio 67 - const: phy 68 - const: pm 69 - const: tx 70 - const: rx 71 - if: 72 properties: 73 compatible: 74 contains: 75 const: socionext,uniphier-pxs2-ahci-phy 76 then: 77 properties: 78 clocks: 79 maxItems: 1 80 clock-names: 81 const: link 82 resets: 83 minItems: 2 84 maxItems: 2 85 reset-names: 86 items: 87 - const: link 88 - const: phy 89 - if: 90 properties: 91 compatible: 92 contains: 93 const: socionext,uniphier-pxs3-ahci-phy 94 then: 95 properties: 96 clocks: 97 minItems: 2 98 maxItems: 2 99 clock-names: 100 items: 101 - const: link 102 - const: phy 103 resets: 104 minItems: 2 105 maxItems: 2 106 reset-names: 107 items: 108 - const: link 109 - const: phy 110 111required: 112 - compatible 113 - reg 114 - "#phy-cells" 115 - clocks 116 - clock-names 117 - resets 118 - reset-names 119 120additionalProperties: false 121 122examples: 123 - | 124 ahci_phy: phy@10 { 125 compatible = "socionext,uniphier-pxs3-ahci-phy"; 126 reg = <0x10 0x10>; 127 #phy-cells = <0>; 128 clock-names = "link", "phy"; 129 clocks = <&sys_clk 28>, <&sys_clk 30>; 130 reset-names = "link", "phy"; 131 resets = <&sys_rst 28>, <&sys_rst 30>; 132 }; 133