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Searched full:ddr52 (Results 1 – 23 of 23) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci-am654.yaml109 ti,otap-del-sel-ddr52:
110 description: Output tap delay for eMMC DDR52 timing
167 ti,itap-del-sel-ddr52:
168 description: Input tap delay for MMC DDR52 timing
234 ti,otap-del-sel-ddr52 = <0x5>;
239 ti,itap-del-sel-ddr52 = <0x3>;
H A Dsdhci-am654.txt30 - ti,otap-del-sel-ddr52
57 ti,otap-del-sel-ddr52 = <0x5>;
H A Dsdhci-sprd.txt38 - sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing.
H A Dsprd,sdhci-r11.yaml53 "^sprd,phy-delay-(legacy|mmc-(ddr52|highspeed|hs[24]00|hs400es)|sd-(highspeed|uhs-sdr(50|104)))$":
107 sprd,phy-delay-mmc-ddr52 = <0x3f 0x75 0x14 0x14>;
H A Dmmc-controller.yaml348 "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
/freebsd/sys/dev/mmc/
H A Dbridge.h158 #define MMC_CAP_MMC_DDR52_120 (1 << 11) /* Can do eMMC DDR52 at 1.2 V */
159 #define MMC_CAP_MMC_DDR52_180 (1 << 12) /* Can do eMMC DDR52 at 1.8 V */
H A Dmmc.c2327 * DDR52 before eventually switching to HS200; mmc_set_timing() in mmc_switch_to_hs200()
/freebsd/sys/dev/sdhci/
H A Dsdhci_pci.c112 /* DDR52 is supported but affected by the VLI54 erratum */
121 /* DDR52 is supported but affected by the VLI54 erratum */
H A Dsdhci_acpi.c317 * but while with these former DDR52 is affected by the VLI54 erratum, in sdhci_acpi_attach()
H A Dsdhci.h82 /* Controller supports eMMC DDR52 mode. */
H A Dsdhci.c317 (host_caps & MMC_CAP_MMC_DDR52) ? " DDR52" : "", in sdhci_dumpcaps_buf()
/freebsd/sys/contrib/device-tree/src/arm64/sprd/
H A Dwhale2.dtsi153 sprd,phy-delay-mmc-ddr52 = <0x3f 0x75 0x14 0x14>;
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62p-j722s-common-main.dtsi578 ti,otap-del-sel-ddr52 = <0x6>;
583 ti,itap-del-sel-ddr52 = <0x3>;
H A Dk3-am65-main.dtsi450 ti,otap-del-sel-ddr52 = <0x5>;
452 ti,itap-del-sel-ddr52 = <0x0>;
H A Dk3-am64-main.dtsi638 ti,otap-del-sel-ddr52 = <0x6>;
642 ti,itap-del-sel-ddr52 = <0x3>;
H A Dk3-j7200-main.dtsi641 ti,otap-del-sel-ddr52 = <0x6>;
646 ti,itap-del-sel-ddr52 = <0x3>;
H A Dk3-am62-main.dtsi564 ti,otap-del-sel-ddr52 = <0x5>;
H A Dk3-j721e-main.dtsi1599 ti,otap-del-sel-ddr52 = <0x5>;
1604 ti,itap-del-sel-ddr52 = <0x3>;
H A Dk3-j721s2-main.dtsi730 ti,otap-del-sel-ddr52 = <0x6>;
H A Dk3-j784s4-main.dtsi1013 ti,otap-del-sel-ddr52 = <0x6>;
/freebsd/sys/cam/
H A Dcam_ccb.h1095 #define MMC_CAP_MMC_DDR52_120 (1 << 11) /* Can do eMMC DDR52 at 1.2 V */
1096 #define MMC_CAP_MMC_DDR52_180 (1 << 12) /* Can do eMMC DDR52 at 1.8 V */
/freebsd/sys/cam/mmc/
H A Dmmc_da.c1367 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.2V\n")); in sdda_start_init()
1373 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.8V\n")); in sdda_start_init()
/freebsd/sbin/camcontrol/
H A Dcamcontrol.c8138 printf(" Can do eMMC DDR52 at 1.2V\n"); in mmcsdcmd()
8140 printf(" Can do eMMC DDR52 at 1.8V\n"); in mmcsdcmd()