1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4 5$id: http://devicetree.org/schemas/display/msm/hdmi.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Qualcomm Adreno/Snapdragon HDMI output 9 10maintainers: 11 - Rob Clark <robdclark@gmail.com> 12 13properties: 14 compatible: 15 enum: 16 - qcom,hdmi-tx-8084 17 - qcom,hdmi-tx-8660 18 - qcom,hdmi-tx-8960 19 - qcom,hdmi-tx-8974 20 - qcom,hdmi-tx-8994 21 - qcom,hdmi-tx-8996 22 - qcom,hdmi-tx-8998 23 24 clocks: 25 minItems: 1 26 maxItems: 8 27 28 clock-names: 29 minItems: 1 30 maxItems: 8 31 32 reg: 33 minItems: 1 34 maxItems: 3 35 36 reg-names: 37 minItems: 1 38 items: 39 - const: core_physical 40 - const: qfprom_physical 41 - const: hdcp_physical 42 43 interrupts: 44 maxItems: 1 45 46 phys: 47 maxItems: 1 48 49 phy-names: 50 enum: 51 - hdmi_phy 52 - hdmi-phy 53 deprecated: true 54 55 core-vdda-supply: 56 description: phandle to VDDA supply regulator 57 58 hdmi-mux-supply: 59 description: phandle to mux regulator 60 deprecated: true 61 62 core-vcc-supply: 63 description: phandle to VCC supply regulator 64 65 hpd-gpios: 66 maxItems: 1 67 description: hpd pin 68 69 qcom,hdmi-tx-mux-en-gpios: 70 maxItems: 1 71 deprecated: true 72 description: HDMI mux enable pin 73 74 qcom,hdmi-tx-mux-sel-gpios: 75 maxItems: 1 76 deprecated: true 77 description: HDMI mux select pin 78 79 qcom,hdmi-tx-mux-lpm-gpios: 80 maxItems: 1 81 deprecated: true 82 description: HDMI mux lpm pin 83 84 '#sound-dai-cells': 85 const: 1 86 87 ports: 88 type: object 89 $ref: /schemas/graph.yaml#/properties/ports 90 properties: 91 port@0: 92 $ref: /schemas/graph.yaml#/$defs/port-base 93 description: | 94 Input endpoints of the controller. 95 96 port@1: 97 $ref: /schemas/graph.yaml#/$defs/port-base 98 description: | 99 Output endpoints of the controller. 100 101 required: 102 - port@0 103 104required: 105 - compatible 106 - clocks 107 - clock-names 108 - reg 109 - reg-names 110 - interrupts 111 - phys 112 113allOf: 114 - if: 115 properties: 116 compatible: 117 contains: 118 enum: 119 - qcom,hdmi-tx-8960 120 - qcom,hdmi-tx-8660 121 then: 122 properties: 123 clocks: 124 minItems: 3 125 maxItems: 3 126 clock-names: 127 items: 128 - const: core 129 - const: master_iface 130 - const: slave_iface 131 core-vcc-supplies: false 132 133 - if: 134 properties: 135 compatible: 136 contains: 137 enum: 138 - qcom,hdmi-tx-8974 139 - qcom,hdmi-tx-8084 140 - qcom,hdmi-tx-8994 141 - qcom,hdmi-tx-8996 142 then: 143 properties: 144 clocks: 145 minItems: 5 146 maxItems: 5 147 clock-names: 148 items: 149 - const: mdp_core 150 - const: iface 151 - const: core 152 - const: alt_iface 153 - const: extp 154 hdmi-mux-supplies: false 155 156 - if: 157 properties: 158 compatible: 159 contains: 160 enum: 161 - qcom,hdmi-tx-8998 162 then: 163 properties: 164 clocks: 165 minItems: 8 166 maxItems: 8 167 clock-names: 168 items: 169 - const: mdp_core 170 - const: iface 171 - const: core 172 - const: alt_iface 173 - const: extp 174 - const: bus 175 - const: mnoc 176 - const: iface_mmss 177 178additionalProperties: false 179 180examples: 181 - | 182 #include <dt-bindings/gpio/gpio.h> 183 #include <dt-bindings/interrupt-controller/irq.h> 184 #include <dt-bindings/interrupt-controller/arm-gic.h> 185 hdmi: hdmi@4a00000 { 186 compatible = "qcom,hdmi-tx-8960"; 187 reg-names = "core_physical"; 188 reg = <0x04a00000 0x2f0>; 189 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 190 clock-names = "core", 191 "master_iface", 192 "slave_iface"; 193 clocks = <&clk 61>, 194 <&clk 72>, 195 <&clk 98>; 196 hpd-gpios = <&msmgpio 72 GPIO_ACTIVE_HIGH>; 197 core-vdda-supply = <&pm8921_hdmi_mvs>; 198 hdmi-mux-supply = <&ext_3p3v>; 199 pinctrl-names = "default", "sleep"; 200 pinctrl-0 = <&hpd_active &ddc_active &cec_active>; 201 pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>; 202 203 phys = <&hdmi_phy>; 204 }; 205 - | 206 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 207 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 208 #include <dt-bindings/gpio/gpio.h> 209 #include <dt-bindings/interrupt-controller/irq.h> 210 #include <dt-bindings/interrupt-controller/arm-gic.h> 211 hdmi@9a0000 { 212 compatible = "qcom,hdmi-tx-8996"; 213 reg = <0x009a0000 0x50c>, 214 <0x00070000 0x6158>, 215 <0x009e0000 0xfff>; 216 reg-names = "core_physical", 217 "qfprom_physical", 218 "hdcp_physical"; 219 220 interrupt-parent = <&mdss>; 221 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 222 223 clocks = <&mmcc MDSS_MDP_CLK>, 224 <&mmcc MDSS_AHB_CLK>, 225 <&mmcc MDSS_HDMI_CLK>, 226 <&mmcc MDSS_HDMI_AHB_CLK>, 227 <&mmcc MDSS_EXTPCLK_CLK>; 228 clock-names = "mdp_core", 229 "iface", 230 "core", 231 "alt_iface", 232 "extp"; 233 234 phys = <&hdmi_phy>; 235 #sound-dai-cells = <1>; 236 237 pinctrl-names = "default", "sleep"; 238 pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>; 239 pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>; 240 241 core-vdda-supply = <&vreg_l12a_1p8>; 242 core-vcc-supply = <&vreg_s4a_1p8>; 243 244 ports { 245 #address-cells = <1>; 246 #size-cells = <0>; 247 248 port@0 { 249 reg = <0>; 250 endpoint { 251 remote-endpoint = <&mdp5_intf3_out>; 252 }; 253 }; 254 }; 255 }; 256... 257