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/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Chen-Yu Tsai <wens@csie.org>
15 - Maxime Ripard <mripard@kernel.org>
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
22 - const: allwinner,sun6i-a31-hdmi
23 - items:
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H A Dbrcm,bcm2711-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
15 - brcm,bcm2711-hdmi0
16 - brcm,bcm2711-hdmi1
17 - brcm,bcm2712-hdmi0
18 - brcm,bcm2712-hdmi1
22 - description: HDMI controller register range
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H A Dbrcm,bcm2835-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
14 const: brcm,bcm2835-hdmi
18 - description: HDMI register range
19 - description: HD register range
26 - description: The pixel clock
27 - description: The HDMI state machine clock
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H A Dst,stih4xx.txt3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
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/linux/drivers/gpu/drm/bridge/
H A Dsil-sii8620.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Copyright (C) 2013-2014 Silicon Image, Inc.
243 /* LM DDC, default value: 0x80 */
252 /* DDC I2C Manual, default value: 0x03 */
263 /* DDC I2C Target Slave Address, default value: 0x00 */
267 /* DDC I2C Target Segment Address, default value: 0x00 */
270 /* DDC I2C Target Offset Address, default value: 0x00 */
273 /* DDC I2C Data In count #1, default value: 0x00 */
276 /* DDC I2C Data In count #2, default value: 0x00 */
280 /* DDC I2C Status, default value: 0x04 */
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/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
15 #include <media/cec-pin.h>
37 #define SUN4I_HDMI_VID_TIMING_X(x) ((((x) - 1) & GENMASK(11, 0)))
38 #define SUN4I_HDMI_VID_TIMING_Y(y) ((((y) - 1) & GENMASK(11, 0)) << 16)
135 #define SUN4I_HDMI_DDC_FIFO_CTRL_RX_THRES_MAX (BIT(4) - 1)
138 #define SUN4I_HDMI_DDC_FIFO_CTRL_TX_THRES_MAX (BIT(4) - 1)
143 #define SUN4I_HDMI_DDC_BYTE_COUNT_MAX (BIT(10) - 1)
187 /* DDC CLK bit fields are the same, but the formula is not */
226 /* DDC FIFO register offset */
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H A Dsun4i_hdmi_i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); in fifo_transfer()
50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, in fifo_transfer()
53 return -ETIMEDOUT; in fifo_transfer()
56 return -EIO; in fifo_transfer()
59 ioread8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
61 iowrite8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
64 regmap_field_force_write(hdmi->field_ddc_int_status, in fifo_transfer()
76 if (hdmi->variant->ddc_fifo_has_dir) { in xfer_msg()
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/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/meson-aiu.h>
13 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
22 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
33 led-stat {
34 label = "nanopi-k2:blue:stat";
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i-a10s.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/dma/sun4i-a10.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 framebuffer-lcd0-hdmi {
60 compatible = "allwinner,simple-framebuffer",
61 "simple-framebuffer";
62 allwinner,pipeline = "de_be0-lcd0-hdmi";
70 display-engine {
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H A Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/clock/sun6i-rtc.h>
50 #include <dt-bindings/reset/sun6i-a31-ccu.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
[all …]
H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
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H A Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 interrupt-parent = <&intc>;
11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
52 intc: interrupt-controller@7e00b200 {
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H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-mba6.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2021 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 /delete-property/ mmc2;
19 /delete-property/ mmc3;
24 stdout-path = &uart2;
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/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h2 * Copyright 2012-2023 Advanced Micro Devices, Inc.
61 * MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC
65 * MAX_PLANES - representative of the upper bound of planes that are supported by the HW
118 // for example, 1080p -> 8K is 4.0, or 4000 raw value
126 // for example, 8K -> 1080p is 0.25, or 250 raw value
138 * DOC: color-management-caps
143 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
150 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
166 * struct dpp_color_caps - color pipeline capabilities for display pipe and
171 * just plain 256-entry lookup
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/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
21 #include <linux/dma-mapping.h>
24 #include <media/cec-notifier.h>
26 #include <linux/media-bus-format.h>
40 #include "dw-hdmi-audio.h"
41 #include "dw-hdmi-cec.h"
42 #include "dw-hdmi.h"
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_helpers.c1 // SPDX-License-Identifier: MIT
54 return (u32)edid->mfg_id[0] << 24 | in edid_extract_panel_id()
55 (u32)edid->mfg_id[1] << 16 | in edid_extract_panel_id()
67 edid_caps->panel_patch.wait_after_dpcd_poweroff_ms = 10000; in apply_edid_quirks()
74 edid_caps->panel_patch.disable_fams = true; in apply_edid_quirks()
83 edid_caps->panel_patch.remove_sink_ext_caps = true; in apply_edid_quirks()
88 edid_caps->panel_patch.disable_colorimetry = true; in apply_edid_quirks()
96 * dm_helpers_parse_edid_caps() - Parse edid caps
109 struct amdgpu_dm_connector *aconnector = link->priv; in dm_helpers_parse_edid_caps()
110 struct drm_connector *connector = &aconnector->base; in dm_helpers_parse_edid_caps()
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 sdcc1_default_state: sdcc1-default-state {
5 clk-pins {
7 drive-strength = <16>;
8 bias-disable;
11 cmd-pins {
13 drive-strength = <10>;
14 bias-pull-up;
17 data-pins {
19 drive-strength = <10>;
[all …]
/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a-tqmls1021a-mbls1021a.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
5 * D-82229 Seefeld, Germany.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/linux-event-codes.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/leds/leds-pca9532.h>
15 #include <dt-bindings/net/ti-dp83867.h>
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/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850-lcdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
11 model = "DA850/AM1808/OMAP-L138 LCDK";
12 compatible = "ti,da850-lcdk", "ti,da850";
20 stdout-path = "serial2:115200n8";
28 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
[all …]
/linux/arch/arm64/boot/dts/broadcom/
H A Dbcm2712.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #address-cells = <2>;
8 #size-cells = <2>;
10 interrupt-parent = <&gicv2>;
14 clk_osc: clk-osc {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-output-names = "osc";
18 clock-frequency = <54000000>;
[all …]
/linux/drivers/gpu/drm/vc4/
H A Dvc4_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
21 * and transfers them over an internal MAI (multi-channel audio
53 #include <sound/hdmi-codec.h>
118 struct drm_display_info *display = &vc4_hdmi->connector.display_info; in vc4_hdmi_supports_scrambling()
120 lockdep_assert_held(&vc4_hdmi->mutex); in vc4_hdmi_supports_scrambling()
122 if (!display->is_hdmi) in vc4_hdmi_supports_scrambling()
125 if (!display->hdmi.scdc.supported || in vc4_hdmi_supports_scrambling()
126 !display->hdmi.scdc.scrambling.supported) in vc4_hdmi_supports_scrambling()
143 struct drm_debugfs_entry *entry = m->private; in vc4_hdmi_debugfs_regs()
144 struct vc4_hdmi *vc4_hdmi = entry->file.data; in vc4_hdmi_debugfs_regs()
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3288-cru.h>
8 #include <dt-bindings/power/rk3288-power.h>
9 #include <dt-bindings/thermal/thermal.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #address-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-puma.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pwm/pwm.h>
17 compatible = "gpio-leds";
18 pinctrl-names = "default";
19 pinctrl-0 = <&module_led_pin>;
21 module_led: led-0 {
24 linux,default-trigger = "heartbeat";
25 panic-indicator;
29 extcon_usb3: extcon-usb3 {
30 compatible = "linux,extcon-usb-gpio";
[all …]

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