Home
last modified time | relevance | path

Searched +full:ddc +full:- +full:i2c +full:- +full:bus (Results 1 – 25 of 172) sorted by relevance

1234567

/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
17 +-----+ +-----+
19 +------------------------+ +-----+ +-----+
21 | /----|------+--------+
[all …]
/linux/drivers/video/fbdev/matrox/
H A Di2c-matroxfb.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
16 #include <linux/i2c.h>
18 #include <linux/i2c-algo-bit.h>
20 /* MGA-TVO I2C for G200, G400 */
23 /* primary head DDC for Mystique(?), G100, G200, G400 */
26 /* primary head DDC for Millennium, Millennium II */
29 /* secondary head DDC for G400 */
63 /* software I2C functions */
74 matroxfb_i2c_set(b->minfo, b->mask.data, state); in matroxfb_gpio_setsda()
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dsynopsys,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 bindings for the platform-specific integrations of the DWC HDMI TX.
26 reg-io-width:
36 - description: The bus clock for either AHB and APB
37 - description: The internal register configuration clock
40 clock-names:
[all …]
/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
21 - nvidia,tegra30-hdmi
[all …]
H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
25 - nvidia,tegra210-sor
[all …]
/linux/Documentation/devicetree/bindings/display/connector/
H A Dvga-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/vga-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: vga-connector
18 ddc-i2c-bus:
19 description: phandle link to the I2C controller used for DDC EDID probing
27 - compatible
28 - port
[all …]
H A Dhdmi-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/hdmi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: hdmi-connector
19 - a # Standard full size
20 - b # Never deployed?
21 - c # Mini
22 - d # Micro
[all …]
H A Ddvi-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/dvi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: dvi-connector
18 hpd-gpios:
22 ddc-i2c-bus:
23 description: phandle link to the I2C controller used for DDC EDID probing
34 dual-link:
[all …]
/linux/drivers/gpu/drm/mgag200/
H A Dmgag200_ddc.c14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
29 #include <linux/i2c-algo-bit.h>
30 #include <linux/i2c.h>
75 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_setsda() local
77 mga_i2c_set(ddc->mdev, ddc->data, state); in mgag200_ddc_algo_bit_data_setsda()
82 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_setscl() local
84 mga_i2c_set(ddc->mdev, ddc->clock, state); in mgag200_ddc_algo_bit_data_setscl()
89 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_getsda() local
91 return (mga_i2c_read_gpio(ddc->mdev) & ddc->data) ? 1 : 0; in mgag200_ddc_algo_bit_data_getsda()
96 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_getscl() local
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-opp-microvolt.dtsi"
15 rtc0 = "/i2c@7000d000/tps6586x@34";
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
[all …]
H A Dtegra20-tamonten.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 rtc0 = "/i2c@7000d000/tps6586x@34";
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
34 pinctrl-names = "default";
35 pinctrl-0 = <&state_default>;
213 nvidia,pins = "ddc", "dta", "dtd", "kbca",
[all …]
H A Dtegra20-seaboard.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
12 rtc0 = "/i2c@7000d000/tps6586x@34";
18 stdout-path = "serial0:115200n8";
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-supply = <&vdd_hdmi>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
[all …]
H A Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
7 #include "tegra20-cpu-opp.dtsi"
14 rtc0 = "/i2c@7000c500/rtc@56";
20 stdout-path = "serial0:115200n8";
31 vdd-supply = <&hdmi_vdd_reg>;
32 pll-supply = <&hdmi_pll_reg>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
H A Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
38 /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
[all …]
H A Dtegra124-apalis-v1.2-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis-v1.2.dtsi"
13 compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval",
14 "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
18 rtc0 = "/i2c@7000c000/rtc@68";
19 rtc1 = "/i2c@7000d000/pmic@40";
28 stdout-path = "serial0:115200n8";
[all …]
H A Dtegra124-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis.dtsi"
13 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1",
17 rtc0 = "/i2c@7000c000/rtc@68";
18 rtc1 = "/i2c@7000d000/pmic@40";
27 stdout-path = "serial0:115200n8";
39 hdmi-supply = <&reg_5v0>;
[all …]
H A Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra20-cpu-opp.dtsi"
9 #include "tegra20-cpu-opp-microvolt.dtsi"
18 rtc0 = "/i2c@7000d000/tps6586x@34";
25 stdout-path = "serial0:115200n8";
44 vdd-supply = <&hdmi_vdd_reg>;
45 pll-supply = <&hdmi_pll_reg>;
[all …]
/linux/drivers/gpu/drm/ast/
H A Dast_ddc.c1 // SPDX-License-Identifier: MIT
13 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/i2c.h>
42 struct ast_ddc *ddc = data; in ast_ddc_algo_bit_data_setsda() local
43 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_setsda()
58 struct ast_ddc *ddc = data; in ast_ddc_algo_bit_data_setscl() local
59 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_setscl()
74 struct ast_ddc *ddc = i2c_get_adapdata(adapter); in ast_ddc_algo_bit_data_pre_xfer() local
75 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_pre_xfer()
[all …]
/linux/Documentation/devicetree/bindings/display/
H A Ddp-aux-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort AUX bus
10 - Douglas Anderson <dianders@chromium.org>
14 are hooked up to them. This is the DP AUX bus. Over the DP AUX bus
16 particular, DP sinks support DDC over DP AUX which allows tunneling
17 a standard I2C DDC connection over the AUX channel.
20 of the DP controller under the "aux-bus" node.
[all …]
/linux/drivers/video/fbdev/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 a well-defined interface, so the software doesn't need to know
15 anything about the low-level (hardware register) stuff.
21 On several non-X86 architectures, the frame buffer device is the
29 and the Framebuffer-HOWTO at
30 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
40 are compiling a kernel for a non-x86 architecture.
46 device-aware may cause unexpected results. If unsure, say N.
57 Common utility functions useful to fbdev drivers of VGA-based
82 If you have a PCI-based system, this enables support for these
[all …]
/linux/drivers/gpu/drm/tegra/
H A Doutput.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/i2c.h>
19 #include <media/cec-notifier.h>
31 if (output->panel) { in tegra_output_connector_get_modes()
32 err = drm_panel_get_modes(output->panel, connector); in tegra_output_connector_get_modes()
37 if (output->drm_edid) in tegra_output_connector_get_modes()
38 drm_edid = drm_edid_dup(output->drm_edid); in tegra_output_connector_get_modes()
39 else if (output->ddc) in tegra_output_connector_get_modes()
40 drm_edid = drm_edid_read_ddc(connector, output->ddc); in tegra_output_connector_get_modes()
43 cec_notifier_set_phys_addr(output->cec, in tegra_output_connector_get_modes()
[all …]
/linux/drivers/video/fbdev/i810/
H A Di810-i2c.c1 /*-*- linux-c -*-
2 * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support
45 struct i810fb_par *par = chan->par; in i810i2c_setscl()
46 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setscl()
49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
52 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setscl()
58 struct i810fb_par *par = chan->par; in i810i2c_setsda()
59 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setsda()
62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
[all …]
/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Yao <markyao0591@gmail.com>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18 - $ref: /schemas/sound/dai-common.yaml#
23 - rockchip,rk3228-dw-hdmi
24 - rockchip,rk3288-dw-hdmi
25 - rockchip,rk3328-dw-hdmi
[all …]
/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
14 #include <linux/i2c.h>
21 #include <linux/dma-mapping.h>
24 #include <media/cec-notifier.h>
26 #include <linux/media-bus-format.h>
40 #include "dw-hdmi-audio.h"
41 #include "dw-hdmi-cec.h"
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dradeon_i2c.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
58 if (radeon_connector->router.ddc_valid) in radeon_ddc_probe()
62 ret = i2c_transfer(&radeon_connector->ddc_bus->aux.ddc, msgs, 2); in radeon_ddc_probe()
64 ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2); in radeon_ddc_probe()
68 /* Couldn't find an accessible DDC on this connector */ in radeon_ddc_probe()
83 /* bit banging i2c */
87 struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap); in pre_xfer() local
88 struct radeon_device *rdev = i2c->dev->dev_private; in pre_xfer()
89 struct radeon_i2c_bus_rec *rec = &i2c->rec; in pre_xfer()
92 mutex_lock(&i2c->mutex); in pre_xfer()
[all …]

1234567