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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,dcc.yaml4 $id: http://devicetree.org/schemas/soc/qcom/qcom,dcc.yaml#
13 DCC (Data Capture and Compare) is a DMA engine which is used to save
15 or SW trigger. DCC is used to capture and store data for debugging purpose
21 - qcom,sm7150-dcc
22 - qcom,sm8150-dcc
23 - qcom,sc7280-dcc
24 - qcom,sc7180-dcc
25 - qcom,sdm845-dcc
26 - const: qcom,dcc
30 - description: DCC base
[all …]
/linux/Documentation/ABI/testing/
H A Ddebugfs-driver-dcc1 What: /sys/kernel/debug/dcc/.../ready
5 This file is used to check the status of the dcc
7 A 'Y' here indicates dcc is ready.
9 What: /sys/kernel/debug/dcc/.../trigger
17 What: /sys/kernel/debug/dcc/.../config_reset
22 a dcc driver to the default configuration. When '1'
27 What: /sys/kernel/debug/dcc/.../[list-number]/config
34 can be one of following dcc instructions: read,
45 echo R <addr> <n> <bus> >/sys/kernel/debug/dcc/../[list-number]/config
65 echo W <addr> <n> <bus type> > /sys/kernel/debug/dcc/../[list-number]/config
[all …]
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/tests/
H A Damdgpu_dm_plane_test.c80 struct dc_plane_dcc_param *dcc, in dm_test_init_validate_dcc_inputs() argument
94 dcc->enable = 1; in dm_test_init_validate_dcc_inputs()
95 dcc->independent_64b_blks = 1; in dm_test_init_validate_dcc_inputs()
256 * dm_test_modifier_has_dcc() - Verify helper detects AMD DCC modifiers.
259 * Verify if DCC detection works for linear and AMD DCC modifiers.
263 uint64_t dcc_mod = AMD_FMT_MOD | AMD_FMT_MOD_SET(DCC, 1); in dm_test_modifier_has_dcc()
500 AMD_FMT_MOD_SET(DCC, 1); in dm_test_format_mod_supported()
509 * dm_test_fill_gfx12_plane_attributes_from_modifiers() - Verify GFX12 DCC mapping path.
512 * Verify if GFX12 modifier parsing enables DCC and sets expected DCC block mode.
521 struct dc_plane_dcc_param dcc = {0}; in dm_test_fill_gfx12_plane_attributes_from_modifiers() local
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/linux/drivers/tty/hvc/
H A Dhvc_dcc.c14 #include <asm/dcc.h>
19 /* DCC Status Bits */
26 /* Lock to serialize access to DCC fifo */
63 EARLYCON_DECLARE(dcc, dcc_early_console_setup);
93 * Check if the DCC is enabled. If CONFIG_HVC_DCC_SERIALIZE_SMP is enabled,
103 * If we're not on core 0, but we previously confirmed that DCC is in hvc_dcc_check()
129 * Workqueue function that writes the output FIFO to the DCC on core 0.
138 /* While there's data in the output FIFO, write it to the DCC */ in dcc_put_work()
155 * Workqueue function that reads characters from DCC and puts them into the
164 * Read characters from DCC and put them into the input FIFO, as in dcc_get_work()
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/linux/net/netfilter/
H A Dnf_conntrack_irc.c37 MODULE_DESCRIPTION("IRC (DCC) connection tracking helper");
43 MODULE_PARM_DESC(max_dcc_channels, "max number of expected DCC channels per "
46 MODULE_PARM_DESC(dcc_timeout, "timeout on for unestablished DCC channels");
54 /* tries to get the ip_addr and port out of a dcc command
56 * data pointer to first byte of DCC command data
58 * ip returns parsed ip of dcc command
59 * port returns parsed port of dcc command
165 /* strlen(" :\1DCC SENT t AAAAAAAA P\1\n")=26 in help()
176 /* then check that place only for the DCC command */ in help()
177 if (memcmp(data, "\1DCC ", 5)) in help()
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H A Dnf_nat_irc.c25 MODULE_DESCRIPTION("IRC (DCC) NAT helper");
58 /* strlen("\1DCC CHAT chat AAAAAAAA P\1\n")=27 in help()
59 * strlen("\1DCC SCHAT chat AAAAAAAA P\1\n")=28 in help()
60 * strlen("\1DCC SEND F AAAAAAAA P S\1\n")=26 in help()
61 * strlen("\1DCC MOVE F AAAAAAAA P S\1\n")=26 in help()
62 * strlen("\1DCC TSEND F AAAAAAAA P S\1\n")=27 in help()
H A DKconfig259 tristate "IRC DCC protocol support (obsolete)"
262 Direct Client-to-Client Protocol (DCC). This enables users to send
264 of a server. DCC Sending is used anywhere you send files over IRC,
265 and DCC Chat is most commonly used by Eggdrop bots. If you are
269 DCC tracking behind NAT requires plaintext (unencrypted) IRC, so
/linux/Documentation/devicetree/bindings/serial/
H A Darm,dcc.yaml4 $id: http://devicetree.org/schemas/serial/arm,dcc.yaml#
7 title: ARM DCC (Data communication channel) serial emulation
13 ARM DCC (Data communication channel) serial emulation interface available
19 const: arm,dcc
29 compatible = "arm,dcc";
/linux/drivers/bus/
H A Dvexpress-config.c108 u32 *position, u32 *dcc) in vexpress_config_get_topo() argument
116 vexpress_config_find_prop(node, "arm,vexpress,dcc", dcc); in vexpress_config_get_topo()
257 u32 site, position, dcc; in vexpress_syscfg_regmap_init() local
261 &position, &dcc); in vexpress_syscfg_regmap_init()
301 func, site, position, dcc, in vexpress_syscfg_regmap_init()
304 func->template[i] = SYS_CFGCTRL_DCC(dcc); in vexpress_syscfg_regmap_init()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn201/
H A Ddcn201_hubp.c48 struct dc_plane_dcc_param *dcc, in hubp201_program_surface_config() argument
52 hubp1_dcc_control(hubp, dcc->enable, dcc->independent_64b_blks); in hubp201_program_surface_config()
54 hubp1_program_size(hubp, format, plane_size, dcc); in hubp201_program_surface_config()
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca5s.dts144 dcc {
202 temp-dcc {
203 /* DCC internal operating temperature */
206 label = "DCC";
H A Dvexpress-v2p-ca15-tc1.dts141 dcc {
217 temp-dcc {
218 /* DCC internal temperature */
221 label = "DCC";
/linux/arch/arm64/include/asm/
H A Ddcc.h6 * not speculative read the DCC status before executing the read or write
10 * and instead reads the DCC register every time.
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zcu1275-revA.dts22 serial1 = &dcc;
37 &dcc {
H A Dzynqmp-zc1254-revA.dts22 serial1 = &dcc;
37 &dcc {
H A Dzynqmp-zc1232-revA.dts21 serial1 = &dcc;
36 &dcc {
/linux/drivers/irqchip/
H A Dirq-gic-realview.c62 /* new irq mode with no DCC */ in realview_gic_of_init()
69 pr_info("RealView GIC: set up interrupt controller to NEW mode, no DCC\n"); in realview_gic_of_init()
/linux/sound/soc/codecs/
H A Dmt6357.c232 "DCC",
407 /* Audio L/R preamplifier DCC precharge */ in mt6357_set_amic()
423 /* Audio L preamplifier DCC precharge disable */ in mt6357_set_amic()
431 /* Audio R preamplifier DCC precharge disable */ in mt6357_set_amic()
662 /* Audio L preamplifier DCC precharge off */ in mt_pga_left_event()
683 /* disable Audio L preamplifier DCC precharge */ in mt_pga_left_event()
713 /* Audio R preamplifier DCC precharge off */ in mt_pga_right_event()
730 /* disable Audio R preamplifier DCC precharge */ in mt_pga_right_event()
1603 {"Mic Type Mux", "DCC", "ADC"},
H A Dmt6358.c679 "DCC",
1549 /* DCC 50k CLK (from 26M) */ in mt6358_amic_enable()
1591 /* Audio L/R preamplifier DCC precharge */ in mt6358_amic_enable()
1662 /* Audio L preamplifier DCC precharge off */ in mt6358_amic_enable()
1665 /* Audio R preamplifier DCC precharge off */ in mt6358_amic_enable()
1712 /* disable L preamplifier DCC precharge */ in mt6358_amic_disable()
1726 /* disable R preamplifier DCC precharge */ in mt6358_amic_disable()
2155 {"Mic Type Mux", "DCC", "ADC L"},
2156 {"Mic Type Mux", "DCC", "ADC R"},
/linux/arch/arm/include/debug/
H A Dicedcc.S8 @@ debug using ARM EmbeddedICE DCC channel
/linux/include/uapi/linux/
H A Datm.h190 #define ATM_AFI_DCC 0x39 /* DCC ATM Format */
195 #define ATM_AFI_DCC_GROUP 0xBD /* DCC ATM Group Format */
/linux/include/linux/clk/
H A Dti.h53 * @dcc_mask: mask of the DPLL DCC correction bitfield @mult_div1_reg
54 * @dcc_rate: rate atleast which DCC @dcc_mask must be set
/linux/arch/arm64/boot/dts/arm/
H A Dvexpress-v2f-1xv7-ca53x2.dts110 dcc {
/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos-hdmi.yaml38 Provides voltage source for DCC lines available on HDMI connector. When
/linux/Documentation/devicetree/bindings/sound/
H A Dst,sta350.txt83 If present, distortion compensation variable uses DCC coefficient.

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