/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jos [all...] |
H A D | intel,dwmac-plat.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> 17 - intel,keembay-dwmac 19 - compatible 22 - $ref: snps,dwmac.yaml# 27 - items: 28 - enum: [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sa8540p-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include "sa8540p-pmics.dtsi" 17 compatible = "qcom,sa8540p-rid [all...] |
H A D | sa8155p-adp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 16 compatible = "qcom,sa8155p-adp", "qcom,sa8155p"; 24 stdout-path = "serial0:115200n8"; 27 vreg_3p3: vreg-3p3-regulator { 28 compatible = "regulator-fixed"; 29 regulator-name = "vreg_3p3"; 30 regulator-min-microvolt = <3300000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mp-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/phy/phy-imx8-pcie.h> 13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp"; 16 stdout-path = &uart2; 19 hdmi-connecto [all...] |
H A D | imx8mp-verdin.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 7 #include <dt-bindings/pwm/pwm.h> 12 stdout-pat [all...] |
/freebsd/sys/dev/ixgbe/ |
H A D | ixgbe_dcb_82599.c | 2 SPDX-License-Identifier: BSD-3-Clause 4 Copyright (c) 2001-2020, Intel Corporation 41 * ixgbe_dcb_get_tc_stats_82599 - Returns status for each traffic class 62 stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc)); in ixgbe_dcb_get_tc_stats_82599() 64 stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(tc)); in ixgbe_dcb_get_tc_stats_82599() 65 stats->qbtc[tc] += in ixgbe_dcb_get_tc_stats_82599() 68 stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc)); in ixgbe_dcb_get_tc_stats_82599() 70 stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(tc)); in ixgbe_dcb_get_tc_stats_82599() 71 stats->qbrc[tc] += in ixgbe_dcb_get_tc_stats_82599() 75 stats->qprdc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRDC(tc)); in ixgbe_dcb_get_tc_stats_82599() [all …]
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H A D | ixgbe_dcb_82598.c | 2 SPDX-License-Identifier: BSD-3-Clause 4 Copyright (c) 2001-2020, Intel Corporation 41 * ixgbe_dcb_get_tc_stats_82598 - Return status data for each traffic class 62 stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc)); in ixgbe_dcb_get_tc_stats_82598() 64 stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC(tc)); in ixgbe_dcb_get_tc_stats_82598() 66 stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc)); in ixgbe_dcb_get_tc_stats_82598() 68 stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC(tc)); in ixgbe_dcb_get_tc_stats_82598() 75 * ixgbe_dcb_get_pfc_stats_82598 - Returns CBFC status data 95 stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc)); in ixgbe_dcb_get_pfc_stats_82598() 97 stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(tc)); in ixgbe_dcb_get_pfc_stats_82598() [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt2712e.dtsi | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt2712-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/memory/mt2712-larb-port.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt2712-power.h> 14 #include "mt2712-pinfunc.h" 18 interrupt-parent = <&sysirq>; 19 #address-cells = <2>; [all …]
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H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controlle [all...] |
/freebsd/sys/contrib/openzfs/module/zfs/ |
H A D | dmu_tx.c | 9 * or https://opensource.org/licenses/CDDL-1.0. 68 tx->tx_dir = dd; in dmu_tx_create_dd() 70 tx->tx_pool = dd->dd_pool; in dmu_tx_create_dd() 71 list_create(&tx->tx_holds, sizeof (dmu_tx_hold_t), in dmu_tx_create_dd() 73 list_create(&tx->tx_callbacks, sizeof (dmu_tx_callback_t), in dmu_tx_create_dd() 75 tx->tx_start = gethrtime(); in dmu_tx_create_dd() 82 dmu_tx_t *tx = dmu_tx_create_dd(os->os_dsl_dataset->ds_dir); in dmu_tx_create() 83 tx->tx_objset = os; in dmu_tx_create() 92 TXG_VERIFY(dp->dp_spa, txg); in dmu_tx_create_assigned() 93 tx->tx_pool = dp; in dmu_tx_create_assigned() [all …]
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/freebsd/sys/dev/ice/ |
H A D | ice_lib.c | 1 /* SPDX-License-Identifier: BSD-3-Clause */ 267 * ice_map_bar - Map PCIe BAR memory in ice_map_bar() 278 if (bar->res != NULL) { in ice_map_bar() 283 bar->rid = PCIR_BAR(bar_num); 284 bar->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &bar->rid, 286 if (!bar->re [all...] |
H A D | ice_type.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */ 56 * DIV_S64 - Divide signed 64-bit value with signed 64-bit divisor 60 * Use DIV_S64 for any 64-bit divide which operates on signed 64-bit dividends. 61 * Do not use this for unsigned 64-bi 459 u8 dcb; global() member [all...] |
H A D | if_ice_iflib.c | 1 /* SPDX-License-Identifier: BSD-3-Clause */ 252 * scctx->isc_tx_tso_size_max + the VLAN header is a valid size. 256 * DMA tag. However, scctx->isc_tx_tso_segsize_max is used to set the 285 * IFLIB_SKIP_MSIX allows the driver to handle allocating MSI-X 308 /* Static driver-wide sysctls */ 312 * ice_pci_mapping - Map PCI BAR memory 323 rc = ice_map_bar(sc->dev, &sc->bar0, 0); in ice_pci_mapping() 331 * ice_free_pci_mapping - Release PCI BAR memory 340 ice_free_bar(sc->dev, &sc->bar0); in ice_free_pci_mapping() 348 * ice_register - register device method callback [all …]
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/freebsd/sys/dev/bxe/ |
H A D | ecore_hsi.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved. 145 /* Up to 16 bytes of NULL-terminated string */ 164 (if multiple found, priority order is: NC-SI, UMP, IPMI) */ 169 /* Use SPIO4 as an arbiter between: 0-NC_SI, 1-IPMI 170 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */ 172 /* Use SPIO4 as an arbiter between: 0-UMP, 1-IPMI 173 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */ 175 /* Use SPIO4 as an arbiter between: 0-NC-SI, 1-UMP [all …]
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H A D | bxe.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved. 64 * FLR Support - bxe_pf_flr_clnup() is called during nic_load in the per 241 static int load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */ 253 /* Interrupt Mode: 0 (IRQ), 1 (MSI/IRQ), and 2 (MSI-X/MSI/IRQ) */ 256 &bxe_interrupt_mode, 0, "Interrupt (MSI-X/MSI/INTx) mode"); 261 &bxe_queue_count, 0, "Multi-Queue queue count"); 288 /* PCI MRRS: -1 (Auto), 0 (128B), 1 (256B), 2 (512B), 3 (1KB) */ 289 static int bxe_mrrs = -1; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/MC/MCParser/ |
H A D | AsmParser.cpp | 1 //===- AsmParser.cpp - Parser for Assembly Files --------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 59 #include <algorithm> 179 /// Are we parsing ms-style inline assembly? 550 /// Maps directive name --> DirectiveKind enum, for 563 /// Maps Codeview def_range types --> CVDefRangeType enum, for 646 // ".dcb" 684 // Macro-like directives [all …]
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/freebsd/sys/dev/axgbe/ |
H A D | xgbe-dev.c | 4 * Copyright (c) 2014-2016,2020 Advanced Micro Devices, Inc. 116 #include "xgbe-common.h" 122 return (if_getmtu(pdata->netdev) + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); in xgbe_get_max_frame() 131 rate = pdata->sysclk_rate; in xgbe_usec_to_riwt() 150 rate = pdata->sysclk_rate; in xgbe_riwt_to_usec() 170 pbl = pdata->pbl; in xgbe_config_pbl_val() 172 if (pdata->pbl > 32) { in xgbe_config_pbl_val() 177 for (i = 0; i < pdata->channel_count; i++) { in xgbe_config_pbl_val() 178 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_CR, PBLX8, in xgbe_config_pbl_val() 181 if (pdata->channel[i]->tx_ring) in xgbe_config_pbl_val() [all …]
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/freebsd/crypto/openssl/crypto/modes/asm/ |
H A D | ghashv8-armx.pl | 2 # Copyright 2014-2023 The OpenSSL Project Authors. All Rights Reserved. 17 # GHASH for ARMv8 Crypto Extension, 64-bit polynomial multiplication. 22 # Biesheuvel of Linaro from bits-n-pieces from other assembly modules. 23 # Just like aesv8-armx.pl this module supports both AArch32 and 28 # Implement 2x aggregated reduction [see ghash-x86.pl for background 34 # improve performance by 20-70% depending on processor. 38 # 64-bit PMULL 32-bit PMULL 32-bit NEON(*) 40 # Cortex-A53 0.85 1.01 8.39 41 # Cortex-A57 0.73 1.17 7.61 55 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or [all …]
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/freebsd/crypto/heimdal/lib/wind/ |
H A D | rfc3454.txt | 63 5.4 Non-character code points...................................12 78 9.1 Stringprep-specific security considerations.................19 86 B.2 Mapping for case-folding used with NFKC.....................32 87 B.3 Mapping for case-folding used with no normalization.........61 91 C.1.2 Non-ASCII space characters..............................79 94 C.2.2 Non-ASCII control characters............................79 96 C.4 Non-character code points...................................80 124 not restricted to the narrow set of US-ASCII characters) has many 134 different input mechanisms, the strings should match on a character- 135 by-character basis. [all …]
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/freebsd/sys/dev/irdma/ |
H A D | irdma_ctrl.c | 1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 4 * Copyright (c) 2015 - 2023 Intel Corporation 16 * - Redistributions of source code must retain the above 20 * - Redistributions in binary form must reproduce the above 43 * irdma_qp_from_entry - Given entry, get to the qp structure 52 return (struct irdma_sc_qp *)((char *)entry - in irdma_qp_from_entry() 57 * irdma_get_qp_from_list - get next qp from a list 72 entry = (head)->next; in irdma_get_qp_from_list() 74 lastentry = &qp->list; in irdma_get_qp_from_list() [all …]
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/freebsd/sys/dev/bnxt/bnxt_en/ |
H A D | hsi_struct_def.h | 1 /*- 34 * Copyright(c) 2001-2024, Broadcom. All rights reserved. The 71 * * 0x0-0xFFF8 - The function ID 72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors 73 * * 0xFFFD - Reserved for user-space HWRM interface 74 * * 0xFFFF - HWRM 122 /* Engine CKV - The Alias key EC curve and ECC public key information. */ 124 /* Engine CKV - Initialization vector. */ 126 /* Engine CKV - Authentication tag. */ 128 /* Engine CKV - The encrypted data. */ [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.td | 1 //===-- PPCInstrInfo.td - The PowerPC Instruction Set ------*- tablegen -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // This file describes the subset of the 32-bit PowerPC instruction set, as used 12 //===----------------------------------------------------------------------===// 16 //===----------------------------------------------------------------------===// 127 //===----------------------------------------------------------------------===// 187 // Perform FADD in round-to-zero mode. 244 // These nodes represent the 32-bit PPC shifts that operate on 6-bit shift 245 // amounts. These nodes are generated by the multi-precision shift code. [all …]
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