xref: /linux/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml (revision 2ed2e359dea752e7758d29a423033031a0b96584) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/marvell,pxa1908.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Marvell PXA1908 Clock Controllers
8
9maintainers:
10  - Duje Mihanović <duje.mihanovic@skole.hr>
11
12description: |
13  The PXA1908 clock subsystem generates and supplies clock to various
14  controllers within the PXA1908 SoC. The PXA1908 contains numerous clock
15  controller blocks, with the ones currently supported being APBC, APBCP, MPMU
16  and APMU roughly corresponding to internal buses.
17
18  All these clock identifiers could be found in <include/dt-bindings/marvell,pxa1908.h>.
19
20properties:
21  compatible:
22    oneOf:
23      - enum:
24          - marvell,pxa1908-apbc
25          - marvell,pxa1908-apbcp
26          - marvell,pxa1908-mpmu
27      - items:
28          - const: marvell,pxa1908-apmu
29          - const: syscon
30
31  reg:
32    maxItems: 1
33
34  '#clock-cells':
35    const: 1
36
37  '#power-domain-cells':
38    const: 1
39
40  '#reset-cells':
41    const: 1
42
43required:
44  - compatible
45  - reg
46  - '#clock-cells'
47
48additionalProperties: false
49
50allOf:
51  - if:
52      not:
53        properties:
54          compatible:
55            contains:
56              const: marvell,pxa1908-apmu
57    then:
58      properties:
59        '#power-domain-cells': false
60  - if:
61      not:
62        properties:
63          compatible:
64            contains:
65              enum:
66                - marvell,pxa1908-apbc
67                - marvell,pxa1908-apbcp
68    then:
69      properties:
70        '#reset-cells': false
71
72examples:
73  # APMU block:
74  - |
75    clock-controller@d4282800 {
76      compatible = "marvell,pxa1908-apmu", "syscon";
77      reg = <0xd4282800 0x400>;
78      #clock-cells = <1>;
79      #power-domain-cells = <1>;
80    };
81