1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/dma/marvell,orion-xor.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Marvell XOR engine 8 9maintainers: 10 - Andrew Lunn <andrew@lunn.ch> 11 - Gregory Clement <gregory.clement@bootlin.com> 12 13properties: 14 compatible: 15 oneOf: 16 - items: 17 - const: marvell,armada-380-xor 18 - const: marvell,orion-xor 19 - enum: 20 - marvell,armada-3700-xor 21 - marvell,orion-xor 22 23 reg: 24 items: 25 - description: Low registers for the XOR engine 26 - description: High registers for the XOR engine 27 28 clocks: 29 maxItems: 1 30 31patternProperties: 32 "^(channel|xor)[0-9]+$": 33 description: XOR channel sub-node 34 type: object 35 additionalProperties: false 36 37 properties: 38 interrupts: 39 description: Interrupt specifier for the XOR channel 40 items: 41 - description: Interrupt for this channel 42 43 dmacap,memcpy: 44 type: boolean 45 deprecated: true 46 description: 47 Indicates that the XOR channel is capable of memcpy operations 48 49 dmacap,memset: 50 type: boolean 51 deprecated: true 52 description: 53 Indicates that the XOR channel is capable of memset operations 54 55 dmacap,xor: 56 type: boolean 57 deprecated: true 58 description: 59 Indicates that the XOR channel is capable of xor operations 60 61 required: 62 - interrupts 63 64required: 65 - compatible 66 - reg 67 68additionalProperties: false 69 70examples: 71 - | 72 xor@d0060900 { 73 compatible = "marvell,orion-xor"; 74 reg = <0xd0060900 0x100>, 75 <0xd0060b00 0x100>; 76 clocks = <&coreclk 0>; 77 78 xor00 { 79 interrupts = <51>; 80 }; 81 xor01 { 82 interrupts = <52>; 83 }; 84 }; 85