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/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044-cpus.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #address-cells = <2>;
8 #size-cells = <2>;
11 #address-cells = <1>;
12 #size-cells = <0>;
13 timebase-frequency = <50000000>;
18 i-cache-block-size = <64>;
19 i-cache-size = <65536>;
20 i-cache-sets = <512>;
21 d-cache-block-size = <64>;
[all …]
H A Dcv180x-cpus.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #address-cells = <1>;
10 #size-cells = <0>;
11 timebase-frequency = <25000000>;
17 d-cache-block-size = <64>;
18 d-cache-sets = <512>;
19 d-cache-size = <65536>;
20 i-cache-block-size = <64>;
21 i-cache-sets = <128>;
22 i-cache-size = <32768>;
[all …]
/linux/arch/riscv/boot/dts/sifive/
H A Dfu540-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu540-c000", "sifive,fu540";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
[all …]
H A Dfu740-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c000", "sifive,fu740";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
[all …]
/linux/Documentation/admin-guide/
H A Dbcache.rst2 A block layer cache (bcache)
6 nice if you could use them as cache... Hence bcache.
11 This is the git repository of bcache-tools:
12 https://git.kernel.org/pub/scm/linux/kernel/git/colyli/bcache-tools.git/
17 It's designed around the performance characteristics of SSDs - it only allocates
18 in erase block sized buckets, and it uses a hybrid btree/log to track cached
19 extents (which can be anywhere from a single sector to the bucket size). It's
20 designed to avoid random writes at all costs; it fills up an erase block
25 great lengths to protect your data - it reliably handles unclean shutdown. (It
29 Writeback caching can use most of the cache for buffering writes - writing
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/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 timebase-frequency = <1000000>;
21 i-cache-block-size = <64>;
[all …]
/linux/fs/squashfs/
H A Dfile.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Squashfs - a compressed read only filesystem for Linux
14 * compressed fragment block (tail-end packed block). The compressed size
15 * of each datablock is stored in a block list contained within the
19 * larger), the code implements an index cache that caches the mapping from
20 * block index to datablock location on disk.
22 * The index cache allows Squashfs to handle large files (up to 1.75 TiB) while
23 * retaining a simple and space-efficient block list on disk. The cache
26 * The index cache is designed to be memory efficient, and by default uses
45 * Locate cache slot in range [offset, index] for specified inode. If
[all …]
H A Dcache.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Squashfs - a compressed read only filesystem for Linux
8 * cache.c
15 * This file implements a generic cache implementation used for both caches,
16 * plus functions layered ontop of the generic cache implementation to
19 * To avoid out of memory and fragmentation issues with vmalloc the cache
22 * It should be noted that the cache is not used for file datablocks, these
23 * are decompressed and cached in the page-cache in the normal way. The
24 * cache is only used to temporarily cache fragment and metadata blocks
29 * have been packed with it, these because of locality-of-reference may be read
[all …]
H A Dsuper.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Squashfs - a compressed read only filesystem for Linux
13 * in-memory structures at mount time, and all the VFS glue code to register
76 opts->thread_ops = &squashfs_decompressor_single; in squashfs_parse_param_threads_str()
80 opts->thread_ops = &squashfs_decompressor_multi; in squashfs_parse_param_threads_str()
84 opts->thread_ops = &squashfs_decompressor_percpu; in squashfs_parse_param_threads_str()
88 return -EINVAL; in squashfs_parse_param_threads_str()
99 return -EINVAL; in squashfs_parse_param_threads_num()
101 opts->thread_ops = &squashfs_decompressor_multi; in squashfs_parse_param_threads_num()
102 if (num > opts->thread_ops->max_decompressors()) in squashfs_parse_param_threads_num()
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/linux/arch/powerpc/kernel/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Processor cache information made available to userspace via sysfs;
26 /* per-cpu object for tracking:
27 * - a "cache" kobject for the top-level directory
28 * - a list of "index" objects representing the cpu's local cache hierarchy
31 struct kobject *kobj; /* bare (not embedded) kobject for cache
36 /* "index" object: each cpu's cache directory has an index
37 * subdirectory corresponding to a cache object associated with the
43 struct cache *cache; member
47 * cache type */
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/linux/arch/powerpc/boot/dts/
H A Dmicrowatt.dts1 /dts-v1/;
2 #include <dt-bindings/gpio/gpio.h>
5 #size-cells = <0x02>;
6 #address-cells = <0x02>;
8 compatible = "microwatt-soc";
15 reserved-memory {
16 #size-cells = <0x02>;
17 #address-cells = <0x02>;
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
[all …]
H A Diss4xx-mpic.dts15 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
22 model = "ibm,iss-4xx";
23 compatible = "ibm,iss-4xx";
24 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
[all …]
H A Diss4xx.dts15 /dts-v1/;
18 #address-cells = <2>;
19 #size-cells = <1>;
20 model = "ibm,iss-4xx";
21 compatible = "ibm,iss-4xx";
22 dcr-parent = <&{/cpus/cpu@0}>;
29 #address-cells = <1>;
30 #size-cells = <0>;
36 clock-frequency = <100000000>; // 100Mhz :-)
37 timebase-frequency = <100000000>;
[all …]
H A Dps3.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
14 #size-cells = <2>;
15 #address-cells = <2>;
21 * We'll get the size of the bootmem block from lv1 after startup,
33 * dtc expects a clock-frequency and timebase-frequency entries, so
38 * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one
43 #size-cells = <0>;
44 #address-cells = <1>;
49 ibm,ppc-interrupt-server#s = <0x0 0x1>;
[all …]
/linux/fs/ext2/
H A Dxattr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2001-2003 Andreas Gruenbacher <agruen@suse.de>
18 * block. If all extended attributes of an inode are identical, these
19 * inodes may share the same extended attribute block. Such situations
20 * are automatically detected by keeping a cache of recent attribute block
21 * numbers and hashes over the block's contents in memory.
24 * Extended attribute block layout:
26 * +------------------+
36 * +------------------+
38 * The block header is followed by multiple entry descriptors. These entry
[all …]
/linux/fs/affs/
H A Dfile.c1 // SPDX-License-Identifier: GPL-2.0
5 * (c) 1996 Hans-Joachim Widmaier - Rewritten
7 * (C) 1993 Ray Burr - Modified for Amiga FFS filesystem.
11 * (C) 1991 Linus Torvalds - minix filesystem
26 pr_debug("open(%lu,%d)\n", in affs_file_open()
27 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_open()
28 atomic_inc(&AFFS_I(inode)->i_opencnt); in affs_file_open()
35 pr_debug("release(%lu, %d)\n", in affs_file_release()
36 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_release()
38 if (atomic_dec_and_test(&AFFS_I(inode)->i_opencnt)) { in affs_file_release()
[all …]
/linux/arch/sh/boot/dts/
H A Dj2_mimas_v2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 compatible = "jcore,j2-soc";
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&aic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-frequency = <50000000>;
22 d-cache-size = <8192>;
[all …]
/linux/drivers/mtd/
H A Dsm_ftl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2009 - Maxim Levitsky
16 #include <linux/mtd/nand-ecc-sw-hamming.h>
27 "Timeout (in ms) for cache flush (1000 ms default");
31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
34 /* ------------------- sysfs attributes ---------------------------------- */
47 strncpy(buf, sm_attr->data, sm_attr->len); in sm_attr_show()
48 return sm_attr->len; in sm_attr_show()
61 vendor = kstrndup(ftl->cis_buffer + SM_CIS_VENDOR_OFFSET, in sm_create_sysfs_attributes()
62 SM_SMALL_PAGE - SM_CIS_VENDOR_OFFSET, GFP_KERNEL); in sm_create_sysfs_attributes()
[all …]
/linux/arch/riscv/boot/dts/allwinner/
H A Dsun20i-d1s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
6 #include "sunxi-d1s-t113.dtsi"
10 timebase-frequency = <24000000>;
11 #address-cells = <1>;
12 #size-cells = <0>;
19 d-cache-block-size = <64>;
20 d-cache-sets = <256>;
21 d-cache-size = <32768>;
22 i-cache-block-size = <64>;
[all …]
/linux/sound/pci/emu10k1/
H A Demu10k1_patch.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 * allocate a sample block and copy data from userspace
33 int truesize, size, blocksize; in snd_emu10k1_sample_new() local
37 emu = rec->hw; in snd_emu10k1_sample_new()
39 return -EINVAL; in snd_emu10k1_sample_new()
41 if (sp->v.mode_flags & (SNDRV_SFNT_SAMPLE_BIDIR_LOOP | SNDRV_SFNT_SAMPLE_REVERSE_LOOP)) { in snd_emu10k1_sample_new()
42 /* should instead return -ENOTSUPP; but compatibility */ in snd_emu10k1_sample_new()
43 dev_warn(emu->card->dev, in snd_emu10k1_sample_new()
44 "Emu10k1 wavetable patch %d with unsupported loop feature\n", in snd_emu10k1_sample_new()
45 sp->v.sample); in snd_emu10k1_sample_new()
[all …]
/linux/drivers/md/
H A Ddm-cache-target.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "dm-bio-prison-v2.h"
10 #include "dm-bio-record.h"
11 #include "dm-cache-metadata.h"
12 #include "dm-io-tracker.h"
13 #include "dm-cache-background-tracker.h"
15 #include <linux/dm-io.h>
16 #include <linux/dm-kcopyd.h>
25 #define DM_MSG_PREFIX "cache"
28 "A percentage of time allocated for copying to and/or from cache");
[all …]
/linux/fs/btrfs/
H A Dextent-tree.c1 // SPDX-License-Identifier: GPL-2.0
20 #include "extent-tree.h"
22 #include "disk-io.h"
23 #include "print-tree.h"
27 #include "free-space-cache.h"
28 #include "free-space-tree.h"
30 #include "ref-verify.h"
31 #include "space-info.h"
32 #include "block-rsv.h"
35 #include "dev-replace.h"
[all …]
/linux/tools/perf/
H A Dbuiltin-buildid-cache.c1 // SPDX-License-Identifier: GPL-2.0
3 * builtin-buildid-cache.c
5 * Builtin buildid-cache command: Manages build-id cache
21 #include <subcmd/parse-options.h>
23 #include "util/build-id.h"
27 #include "util/time-utils.h"
29 #include "util/probe-file.h"
43 return -1; in build_id_cache__kcore_buildid()
59 int i, err = -1; in same_kallsyms_reloc()
86 int ret = -1; in build_id_cache__kcore_existing()
[all …]
/linux/arch/riscv/boot/dts/canaan/
H A Dk210.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
6 #include <dt-bindings/clock/k210-clk.h>
7 #include <dt-bindings/pinctrl/k210-fpioa.h>
8 #include <dt-bindings/reset/k210-rst.h>
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "canaan,kendryte-k210";
21 * Since this is a non-ratified draft specification, the kernel does not
[all …]
/linux/drivers/md/persistent-data/
H A Ddm-bitset.h1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include "dm-array.h"
12 /*----------------------------------------------------------------*/
16 * uses a tiny, one word cache to reduce the number of array lookups and so
19 * Like the dm-array that it's based on, the caller needs to keep track of
20 * the size of the bitset separately. The underlying dm-array implicitly
21 * knows how many words it's storing and will return -ENODATA if you try
30 * This describes the bitset and includes the cache. It's not called it
34 * b) Get yourself a root. The root is the index of a block of data on the
45 * Even read operations may trigger the cache to be flushed and as such
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